AMD is seeking a motivated master's student to support high-speed SerDes, optical transceiver, and cable validation for next-generation AI and data-center platforms. The intern will work with experienced engineers on switch-to-AI-NIC interoperability, SerDes tuning, signal-integrity analysis, and optics/AEC qualification. The internship is onsite in Santa Clara, California, and requires 40 hours per week for the full term. It is scheduled for Summer 2027: May 24–August 13, 2027, for semester schools, or June 21–September 10, 2027, for quarter schools. The intern will work under domain experts’ guidance and contribute to active next-generation AI hardware programs, gaining practical experience in SerDes tuning, optical and AEC validation, AI-platform interoperability, test automation, and data-driven engineering analysis. The role is not eligible for visa sponsorship.
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Job Type
Full-time
Career Level
Intern