High-speed Electrical/Optical Post-Silicon Engineer

Qualcomm•San Diego, CA
•$192,000 - $288,000

About The Position

Qualcomm Central Hardware Systems (CHS) is seeking a Senior Lead High-speed Electrical/Optical Post-Silicon Engineer to drive hands-on measurements, validation, and debug of next-generation 224G/448G electrical and optical interconnects. The role spans channel characterization, passive measurements, SerDes validation, PDN debug, and SW/HLOS-driven system validation.

Requirements

  • 8+ years of relevant experience in post-silicon, SI/PI, SerDes/DDR, optical, package/PCB, or system validation.
  • Strong fundamentals in high-speed digital design, SerDes/DDR PHYs, SI/PI, transmission lines, jitter/noise, equalization, channel modeling, and measurement correlation.
  • Hands-on experience with VNAs, oscilloscopes, BERTs, TDR/TDT, rail probing, spectrum analyzers, optical BER/power test equipment, and precision probing/fixturing.
  • Experience validating and debugging high-speed links such as DDR, PCIe/CXL, Ethernet, UCIe/chip-to-chip, optical module interfaces, retimers, or similar SerDes-based interfaces.
  • Strong PDN/system debug experience, including rail noise/ripple, droop/coupling, sequencing, package/board PDN behavior, and workload-driven power stress.
  • Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Software Applications Engineering, Software Development experience, or related work experience.
  • OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Software Applications Engineering, Software Development experience, or related work experience.
  • OR PhD in Engineering, Information Systems, Computer Science, or related field and 6+ years of Software Applications Engineering, Software Development experience, or related work experience.
  • 4+ years of experience with Programming Language such as C, C++, Java, Python, etc.
  • 4+ years of experience with debugging techniques.

Nice To Haves

  • Experience with 112G/224G/448G-class SerDes, PAM4/PAM6/PAM8 signaling, DSP-based SerDes, optical module host interfaces, and advanced equalization/calibration.
  • Experience with IEEE Ethernet, DDR, PCIe/CXL, UCIe, or similar high-speed electrical/optical standards and debug methodologies.
  • Experience with optical/electrical co-validation, module bring-up, optical link debug, electrical-to-optical correlation, retimer/re-driver tuning, and link budget closure.
  • Experience with package/PCB test vehicles, socketed and solder-down platforms, passive/active measurements, and DOE-based characterization.
  • Experience driving complex customer, supplier, or platform escalations where root cause spans silicon, package, board, firmware, software, thermal, and system conditions.
  • Familiarity with Linux, UEFI, HLOS validation, embedded instrumentation, telemetry collection, and stress workloads.

Responsibilities

  • Plan and drive 224G/448G electrical/optical measurements and channel characterization across package, PCB, connector, cable, optical module, and system channels.
  • Analyze S-parameters, loss, impedance, skew, crosstalk, jitter/noise, reflections, eye margin, and link robustness; correlate bench data to simulations and package/board models.
  • Lead bring-up, characterization, margining, shmoo, stress, compliance-readiness, and SW/HLOS-level validation across reference boards, optical modules, retimers, active/passive cables, and customer-like platforms.
  • Validate tuning, link training, equalization, calibration, FEC/error counters, and workload traffic patterns.
  • Drive PDN measurement and failure isolation across self-noise, coupling, rail droop/ripple, sequencing, package/board power delivery, SI/PI, optics, firmware, drivers, clocking, thermal, software workloads, and platform integration.
  • Translate ambiguous lab/field signatures into RCA hypotheses and debug plans.
  • Develop automation, data reduction scripts, dashboards, regression flows, and stress content to reproduce, isolate, and prevent electrical/optical/PDN failures.
  • Work with SerDes PHY, SIPI/PDN, package, PCB, optics, firmware, software, validation, systems architecture, platform, customer engineering, suppliers, and ecosystem partners to drive closure.

Benefits

  • Competitive annual discretionary bonus program
  • Opportunity for annual RSU grants
  • Highly competitive benefits package designed to support your success at work, at home, and at play.
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