High-Bandwidth Memory (HBM) System Validation Lead (AI Accelerator Platform)

Qualcomm•San Diego, CA

2d•$174,400 - $261,600

About The Position

Qualcomm’s System Validation & Emulation (SVE) team is part of the central SoC validation organization responsible for ensuring end-to-end silicon quality across pre- and post-silicon phases. This role focuses on content quality and system-level validation enablement, offering deep exposure to Qualcomm SoCs through bare-metal validation content, scalable automation frameworks, and complex system debugs. Engineers in this role work across HW and SW boundaries to develop, validate, and scale system-level test content, ensuring high-quality silicon validation across a wide range of SoC domains. Excellent Opportunity to work on cutting-edge SoCs across multiple product segments, including: Premium mobile and flagship platforms, Data center, AI Accelerator platform. Qualcomm is building next-generation AI accelerator platforms featuring advanced memory technologies and chiplet-based architectures. We are seeking an experienced Memory System Validation lead to define and execute validation strategies for custom high-bandwidth memory subsystems integrated with large-scale AI compute platforms. In this role, you will lead pre-silicon and post-silicon validation of next-generation stacked memory solutions, driving memory bring-up, performance characterization, stress validation, reliability analysis, debug, and production readiness across the product lifecycle. The ideal candidate possesses deep expertise in DDR/HBM technologies, memory controller architectures, silicon bring-up, and system-level debug.

Requirements

BS/MS/PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
8+ years of experience in memory validation, silicon validation, or platform bring-up.
Strong understanding of: DDR4/DDR5/LPDDR5/LPDDR6 architectures, HBM technologies, Memory controllers, PHY architectures, Cache and coherency systems.
Experience with: Pre-silicon validation, FPGA platforms, Post-silicon bring-up.
Strong debugging skills using: Logic analyzers, Protocol analyzers, Performance counters, Firmware traces.
Programming experience in Python, C/C++.
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Nice To Haves

Prior experience validating: HBM2, HBM3, HBM3E, Advanced stacked-memory technologies.
Experience with AI accelerator, GPU, HPC, or server-class platforms.
Familiarity with: NoCs, Chiplets, Coherent interconnects.
Knowledge of: Signal Integrity (SI), Power Integrity (PI), Thermal characterization, Package-level interactions.
Experience defining validation methodologies for first-generation memory technologies.

Responsibilities

Own end-to-end HBM validation strategy from emulation through production silicon.
Develop comprehensive validation plans covering: Memory initialization, Training flows, Power-state transitions, Reliability testing, Error recovery mechanisms, Manufacturing diagnostics, Reliability & RAS Validation.
Drive Pre-silicon memory bring-up.
Drive first-silicon memory bring-up and root-cause analysis of failures.
Validate interaction between: HBM, AI accelerators, Compute fabrics, Cache hierarchy, NoC infrastructure.
Develop stress scenarios representing real-world AI workloads.
Lead complex silicon debug efforts.
Analyze crashes, hangs, data corruption, training failures, and performance bottlenecks.
Collaborate with: Memory architecture teams, PHY teams, Firmware teams, Package and SI/PI teams, AI software teams.
Develop scalable automation frameworks for memory validation.
Build telemetry, analytics, debug, and performance-monitoring tools.
Leverage AI-assisted validation and debug methodologies to improve productivity and coverage.