Hardware Test Engineer, Raxium

Google • Fremont, CA

4h • $120,000 - $172,000

About The Position

Be part of a team that pushes boundaries, developing custom silicon solutions
that power the future of Google's direct-to-consumer products. You'll contribute
to the innovation behind products loved by millions worldwide. Your expertise
will shape the next generation of hardware experiences, delivering unparalleled
performance, efficiency, and integration.

Raxium has established a revolutionary semiconductor materials display
technology that enables new functionality in display products, bringing to users
a closer and more natural linkage between the digital and physical realms in
applications such as augmented reality (AR) and light-field display. With
start-up roots and a state-of-the-art compound semiconductor fab in Silicon
Valley, Raxium is seeking to build upon its exceptional Engineering team, with
an aim to disrupt next-generation display markets.

In this role, you will contribute to the innovation behind products loved by
millions worldwide and work as part of an exceptional team as Google develops a
truly novel display technology.

You will have a deep passion for learning, innovating and solving problem with
data analytical experience in the wafer fabrication process, this role could be
just what you seek.

Google's Raxium display group has established a revolutionary semiconductor
materials display technology that enables new functionality in display products,
bringing to users a closer and more natural linkage between the digital and
physical realms in applications such as augmented reality (AR) and light-field
display. With start-up roots and a state-of-the-art compound semiconductor fab
in Silicon Valley, Raxium is seeking to build upon its engineering team with an
aim to disrupt next-generation display markets.

Requirements

• Bachelor's degree in Electrical Engineering, Applied Physics, Optics, Material Sciences, Mechanical Engineering, a related technical field, or equivalent practical experience.
• 5 years of experience in a production semiconductor wafer fab clean room environment (e.g. encompassing area of lithography, thin film, etch, clean, metallization, thermal, backside wafer thinning, and wafer metrology tools).
• Ability to work non-standard hours, including rotational shifts, weekends, and holidays to support 24x7 operations.

Nice To Haves

• Knowledge of semiconductor process integration.
• Ability to be a self-driven individual with strong investigative capabilities.
• Ability to learn fast, work independently and adapt in a fluid and changing environment.
• Ability to communicate cross-functionally effectively (e.g., verbally, emails, reports, technical documents).
• Excellent investigative, critical thinking, and problem-solving skills.

Responsibilities

• Monitor, sustain, and support fabrication processes encompassing areas of lithography, thin film, etch, clean, thermal, metrology or characterization and backside wafer thinning. Ensure process robustness, efficiency and consistency by providing technical support to technicians.
• Work with process, metrology and integration engineers to review, propose, optimize, improve and implement various wafer fabrication processes and new equipment introduction for safety enhancement, yield improvement, defectivity reduction, and manufacturability.
• Enhance area process control plan and the process capability through implementation of best known manufacturing methods, lean manufacturing principle and the statistical process control (SPC).
• Drive problem resolution process associated with the quality excursion in the fab area encompassing data analytics, methodical problem-solving, failure analysis (FA), design of experiments (DOE), and mistake-proof.
• Document process specifications, procedures, out of control action plan (OCAP) and train the technicians.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level