Hardware & Silicon Validation Senior Staff Engineer

Marvell Technology•Santa Clara, CA

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Custom Cloud Solutions (CCS) Hardware Validation Group is responsible for ensuring the quality, reliability, and performance of next generation data center ASIC and SoC products spanning a diverse portfolio that includes cloud infrastructure, AI accelerators, network processors, NICs, custom ASICs, SSD controllers, CXL devices, and domain specific accelerators. The team owns end to end hardware validation, working across the product lifecycle from early silicon bring up through system level qualification. Our scope includes functional hardware validation, electrical characterization, high speed SERDES validation, and system/platform validation, all executed in advanced, fully instrumented hardware labs. The group validates complex, high-performance silicon and platforms across a wide range of critical technologies and interfaces, including Memory Subsystems (DDR, HBM, memory controllers), High Speed Interconnects (PCIe, Ethernet, CPRI, PAM4/NRZ), D2D interconnects, Storage, and IO (Flash and NVME, SSD controllers, USB) and System and Platform testing. What You Can Expect We are seeking a highly motivated Silicon Validation Engineer to join our hardware engineering team. In this role, you will be responsible for validating next generation silicon devices—from early bring up through full product qualification. You’ll work closely with design, verification, firmware, and systems teams to ensure our silicon meets functional, performance, power, and reliability targets. This position is ideal for someone who enjoys hands on lab work, deep debugging, and solving complex hardware problems that span multiple layers of the stack.

Requirements

Bachelor’s degree in computer science, Electrical Engineering or related fields and 3-15 years of related professional experience OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2-10 years of experience.
Experience validating CPUs, GPUs, DSPs, SoCs, or custom ASICs.
Strong understanding of digital logic, computer architecture, and SoC subsystems.
Knowledge of high-speed interfaces such as PCIe, Ethernet is preferable.
Experience with pre-silicon environments (simulation, emulation, FPGA prototyping).
Hands on experience with lab equipment (oscilloscopes, logic analyzers, protocol analyzers).
Proficiency in scripting languages (Python, Perl, Shell) for automation.
Experience with C/C++ for low-level test development.
Familiarity with Linux environments, drivers, and hardware-software interaction.
Strong analytical and debugging instincts.
Clear communication skills for cross-team collaboration.
Ability to work independently in fast-paced, ambiguous hardware development cycles.
Curiosity and a passion for understanding how complex silicon systems behave.

Responsibilities

Develop comprehensive validation plans for SoCs, ASICs, or custom IP blocks.
Execute post-silicon validation, including functional testing, performance characterization and stress testing, measure and analyze silicon performance across workloads and operating conditions.
Work with architecture and design teams to define validation coverage and test strategies.
Bring up first silicon in the lab, including power on, boot, and subsystem initialization.
Use oscilloscopes, logic analyzers, protocol analyzers, and on-chip debug tools to identify and root cause issues.
Work with architecture and design teams to define validation coverage and test strategies.
Collaborate with design, verification, and software teams to drive fixes and verify solutions.