GPU Design Verification Engineer

Intel Corporation•Santa Clara, CA

2d•$141,910 - $232,190•Hybrid

About The Position

Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure designs meet specification requirements. Defines and develops scalable, reusable IP verification plans, test benches, and verification-environment architecture to provide coverage against graphics microarchitecture specifications. Executes verification plans and runs system simulation models to verify designs, analyze power and timing, and uncover bugs. Replicates, root-causes, and debugs presilicon issues, implementing corrective measures to resolve failing tests. Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and help meet functional, performance, and power goals. Documents test plans and leads technical reviews with design and architecture teams. Maintains and improves functional verification infrastructure and methodology, and participates in defining verification infrastructure and related TFMs for functional design verification.

Requirements

Bachelor's degree in Electronics, Computer Engineering, or a related engineering field and 4+ years of silicon design development experience, or a master's degree in one of these fields and 3+ years of silicon design development experience.
IP-level testbench bring-up and strong programming skills in SystemVerilog and UVM.
Hands-on verification experience with ASIC, CPU, or GPU.
IP-level test plan development experience, including coverage closure.
Experience developing coverage-driven verification testbenches, functional models, and tests.

Nice To Haves

Understanding of graphics architecture.
Experience with industry-standard front-end design and verification flows, tools, and methodology.
Experience with scripting using shell, Perl, or Python.

Responsibilities

Perform functional verification of 3D graphics, media, and display logic components against specifications.
Define and develop scalable, reusable IP verification plans, test benches, and verification-environment architecture.
Execute verification plans and run system simulation models to verify designs, analyze power and timing, and uncover bugs.
Replicate, root-cause, and debug presilicon issues; implement corrective measures to resolve failing tests.
Collaborate with GPU architects, RTL developers, and physical design teams to improve verification and meet functional, performance, and power goals.
Document test plans and drive technical reviews of plans and proofs with design and architecture teams.
Maintain and improve functional verification infrastructure and methodology.
Participate in defining verification infrastructure and related TFMs for functional design verification.