GPU Design Verification Engineer

Intel Corporation•Folsom, CA

1d•$105,650 - $200,340•Onsite

About The Position

Join Intel's Graphics IP team as a GPU Design Verification Engineer, where you will play a pivotal role in ensuring the functional accuracy and performance of Intel's leading-edge GPU architectures. This position provides an opportunity to collaborate with a world-class team of architects, designers, and engineers to deliver next-generation graphics solutions. Your work will directly impact Intel's mission to redefine how the world experiences technology, driving innovation across integrated, discrete, and AI-enabled graphics platforms.

Requirements

Bachelor's degree in electrical/computer engineering, Computer Science, or a related STEM field with 3+ years of relevant experience, or a master's degree with 2+ years of experience, or a PhD in related field.
Experience in System Verilog and UVM methodologies.
Experience in testbench development, feature verification, coverage execution, and assertion-based verification.
Experience Python or similar scripting languages.
Expertise in RTL design and debugging using industry-standard tools and methodologies.

Nice To Haves

Experience GPU or CPU architecture, including computer architecture fundamentals.
Debug experience in frontend design and verification flows, tools, and methodologies.
Prior exposure to IP development teams and verification strategies.
Familiarity with programming languages such as C, C++, and object-oriented programming.
Working knowledge of scripting languages like Perl, Ruby, or Python.
Effective problem-solving, debugging, and communication skills.

Responsibilities

Develop scalable and reusable IP verification plans, test benches, and architectures for graphics logic components, including 3D graphics, media, and display.
Execute verification plans and run system simulation models to validate design, analyze power and timing, and identify bugs.
Debug and resolve failing tests in the pre-silicon environment, root cause issues, and implement corrective measures.
Collaborate with architects, RTL developers, and physical design teams to enhance verification methodologies and meet functional, performance, and power goals.
Write specifications for design enhancements and code design changes in RTL while adhering to coding guidelines.
Analyze timing reports to optimize design approaches for frequency requirements.
Develop functional/code coverage goals and ensure coverage closure to maintain high-quality design standards.
Interface with emulation and software teams to align RTL validation efforts.
Contribute to process improvements and gain domain expertise for independent validation execution.