Junior/Intermediate FPGA Engineer (Hybrid)

Kardium Inc.•Burnaby, BC

96d•CA$77,000 - CA$113,000•Hybrid

About The Position

Kardium is seeking a Junior/Intermediate FPGA Engineer to support the development and commercialization of complex, leading-edge FPGA-based systems for their next generation of high-quality medical devices. This role offers hands-on experience in supporting and improving the FPGA designs that power their medical devices. The position is hybrid and located in Burnaby, BC. The role focuses on FPGA development and verification activities within a collaborative team, aiming to enhance FPGA functionality for an innovative product that improves patient outcomes.

Requirements

Bachelor’s degree or higher in electrical engineering, computer engineering, or a related field.
Minimum 4+ years of experience in FPGA development and verification.
Experience with Vivado for FPGA design and Active-HDL for simulation and verification.
Proficiency in VHDL (primary); Verilog/SystemVerilog an asset.
Experience with static timing analysis and closure.
Understanding of AXI (Lite/Full) memory-mapped register interfaces.
Understanding of clock domain crossing (CDC) principles.
Basic understanding of analog/mixed-signal design, high-speed digital design, and signal integrity concepts.
Ability to read electrical schematics.
Experience with debugging tools such as logic analyzers and oscilloscopes.
Proficiency in TCL and Python scripting.
Familiarity with Git-based version control and code review workflows.
Strong problem-solving skills and attention to detail.
Excellent verbal and written communication skills.
Strong interpersonal skills with the ability to interface effectively across multiple disciplines and functions at various levels of the organization.

Nice To Haves

Experience with medical device design and quality requirements
Experience with Zynq FPGAs and SoCs.
Experience with the Xilinx UltraScale+ family.
Experience with linting tools such as Aldec ALINT.
Experience with Aurora and high-speed serial links (GTH transceivers).
Experience with multi-FPGA AXI interconnect design.
Experience with Vivado IP Integrator and TCL-based block design.
Experience with ADC/DAC SPI interfacing.

Responsibilities

Assisting in FPGA design, including implementing and verifying modules under senior team members' guidance.
Supporting debugging efforts for FPGA-related issues, working closely with firmware and hardware teams.
Writing and maintaining testbenches to validate FPGA functionality.
Participating in code reviews, contributing to design improvements and optimization.
Assisting in system integration by collaborating with software, hardware, and verification teams.
Working with multi-FPGA systems, including interconnect design and verification.
Documenting designs, test procedures, and debugging results to ensure knowledge retention and transfer.

Benefits

5% Retirement Savings Plan contribution
Stock option plan
Comprehensive medical & dental coverage
Flexible work environment for daily working hours
3 personal days per year
Support for overall well-being
Top up for maternity leave, adoptive leave, and parental leave for non-birthing parents
Benefit coverage for fertility drug treatment
Career progression and learning support
Professional membership support