FPGA Digital Design Engineer Level 3 (AHT)

Northrop Grumman•Los Angeles, CA

1d•$125,300 - $187,900•Onsite

About The Position

Northrop Grumman Advanced Weapons is hiring an FPGA Digital Design Engineer Level 3 to support the ARRGM-ER missile program in the Advanced Weapons Business Unit in Northridge, California. The position is full-time and on-site; remote or telework arrangements are not available. Travel is 10% of the time, and relocation assistance may be available. The engineer will apply working knowledge of digital signal processing and digital interfaces to FPGA and ASIC design across the full product life cycle. The role uses model-based engineering, DevSecOps, and Agile practices to deliver national defense products and capabilities. The person in this role must be able to obtain an active U.S. Government Secret security clearance. The primary salary range is $125,300 to $187,900. Depending on the position, employees may also be eligible for overtime, shift differential, and a discretionary bonus. Northrop Grumman provides health insurance coverage, life and disability insurance, a savings plan, company-paid holidays, and paid time off for vacation and/or personal business.

Requirements

Bachelor’s degree in electrical engineering or another STEM discipline and 8 or more years of digital design and verification engineering experience using industry-standard simulation tools, or a master’s degree and 6 or more years of that experience.
Hands-on FPGA design experience with VHDL and/or Verilog within the past 6 years.
Experience with AMD/Xilinx and/or Intel/Altera SoC FPGAs.
Experience with EDA tools including Vivado, Quartus, and QuestaSim.
Experience with DOORS.
Experience with programmable logic, FPGA, or digital requirements decomposition, verification, tracing, and design.
Must be able to obtain an active U.S. Government Secret security clearance.

Nice To Haves

Proficiency in DSP algorithms and implementing them on FPGA using MATLAB and Simulink.
Cybersecurity or SSE background or experience.
Experience with Cameo.
Strong VHDL and Verilog design skills.
Experience with FPGA physical constraints and achieving timing closure.
Experience developing low-level FPGA requirements and verification procedures.
Background in RF design.
Experience with board- or system-level debugging using equipment such as oscilloscopes, logic and spectrum analyzers, and RF signal generators.
Experience generating complex test benches in ModelSim or QuestaSim to support formal verification.
Familiarity with the VxWorks RTOS, its architecture, and development tools.
Expertise in high-speed FPGA implementation, such as AXI, DMA, PCIe, HSSI, DDR3, and Ethernet.

Responsibilities

Design, develop, modify, and evaluate digital electronic parts, components, and integrated circuitry for digital electronic equipment and other hardware systems.
Determine design approaches and parameters.
Analyze equipment to establish operating data, conduct experimental tests, and evaluate results.
Select components and equipment based on analysis of specifications and reliability.
Review vendor capability to support product development.
Research, design, and develop complex high-speed digital designs.
Support implementation of digital FPGA hardware architecture and algorithms.
Collaborate with Systems Engineering to ensure firmware design meets system-level requirements.
Review designs and analyses.