FPGA Digital Design Engineer

Kepler Communications • Toronto, ON

1d • CA$131,000 - CA$181,000

About The Position

Kepler Communications is seeking an FPGA Digital Design Engineer to develop the next generation of its satellites. The engineer will design and implement FPGA code, focusing either on DSP algorithms for modulating and demodulating signals aboard software-defined radios or on embedded systems interfacing with processors and peripherals. The role participates in all phases of the FPGA design flow, including simulation, synthesis, place and route, timing closure, and hardware testing. The position also contributes to satellite digital payload development and the communications and network architecture of future spacecraft.

Requirements

• Bachelor’s degree in Computer Engineering, Electrical Engineering, or equivalent.
• At least 5 years of working experience with FPGA/RTL design.
• Experience with Verilog, SystemVerilog, or VHDL, and willingness to learn or pivot to SystemVerilog.
• Experience with Xilinx FPGAs, specifically Zynq and UltraScale.
• Solid understanding of timing principles, including clock domain crossing and timing closure.
• Strong scripting skills, such as Python, Tcl, csh, or bash.
• Experience with FPGA tools such as Vivado or Quartus and HDL simulation tools such as ModelSim.

Nice To Haves

• Master of Science in Computer or Electrical Engineering, or equivalent.
• Experience in coherent digital demodulation of waveforms such as BPSK, QPSK, and QAM.
• Experience with memory-mapped interfaces such as AXI, Wishbone, and Avalon.
• Experience with high-speed transceivers for protocols such as JESD204B, PCIe, and SATA.
• Experience with linting tools, Questa Sim, or Riviera-Pro.
• Experience with Xilinx Versal and RFSoC.
• Experience designing printed circuit boards.
• Knowledge of radio-frequency electronics design.

Responsibilities

• Develop custom IP for new features of Kepler satellite digital payloads.
• Iterate on current DSP and interface designs to improve reliability.
• Work with IP core vendors to integrate new functionality into Kepler designs.
• Work with lead engineers to develop the communications and network architecture of the future satellite constellation.
• Participate in conceptual design studies of new spacecraft.
• Participate in all phases of FPGA design flow, including simulation, synthesis, place and route, timing closure, and hardware testing.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior