FPGA Developer - Kitchener, Ontario, Canada

GTSKitchener, ON
Onsite

About The Position

We are looking to hire a senior hardware engineer to join a small and growing FPGA team developing key components of a high-performance FPGA platform. This role offers broad technical scope and exposure across multiple layers of computing technology, from RTL and verification to high-speed interfaces and system integration. Successful candidates will work on full-stack FPGA systems in a highly collaborative environment, contributing to architecture, implementation, verification, performance optimization, and tooling/CI improvements. GTS is a collection of financial services companies spanning a wide array of asset classes and investment approaches, all powered by the combination of market expertise with innovative, proprietary technology. With roots as a quantitative trading firm continually building for the future, the GTS family of companies are able to leverage the latest in artificial intelligence systems and sophisticated pricing models to bring consistency, efficiency, and transparency to today’s financial markets. GTS’s electronic market maker GTS Securities accounts for 3-5% of daily cash equities volume in the U.S. and is a leading Designated Market Maker (DMM) at the New York Stock Exchange, responsible for nearly $13 trillion of market capitalization. For more information on GTS, please visit www.gtsx.com.

Requirements

  • 5+ years of commercial FPGA or ASIC experience as a hardware design engineer
  • Strong logic design expertise using Verilog, SystemVerilog, VHDL, or SystemC
  • Familiarity with modern FPGA architectures such as Xilinx UltraScale+ or Intel Stratix 10
  • Experience with one or more of: 10/25/100GbE Ethernet, PCIe and DMA, NVMe, DDR / QDR / HBM memory systems
  • Experience with EDA tools from vendors such as Xilinx/AMD, Synopsys, Cadence, or Siemens EDA/Mentor Graphics

Nice To Haves

  • Experience with verification methodologies and frameworks such as Cocotb, UVM, or SystemVerilog Assertions
  • Static timing analysis experience
  • Linux driver or kernel development experience
  • C/C++/Python experience
  • HLS experience
  • SpinalHDL/Chisel experience

Responsibilities

  • Contribute to architecture, implementation, verification, performance optimization, and tooling/CI improvements for full-stack FPGA systems.

Benefits

  • High quality of life
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service