FPGA Design Engineer (Level 3 or 4)

Northrop GrummanLinthicum Heights, MD
$119,600 - $223,900Onsite

About The Position

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Join Northrop Grumman on our continued mission to push the boundaries of possible across space systems. Enjoy a culture where your voice is valued and start contributing to our team of passionate professionals providing real-life solutions to our world’s biggest challenges. We take pride in creating purposeful work and allowing our employees to grow and achieve their goals every day by Defining Possible. With our competitive pay and comprehensive benefits, we have the right opportunities to fit your life and launch your career today. Northrop Grumman Space Systems, is currently seeking a Principal / Sr. Principal Digital Design Engineer for our Eastern Engineering team located in Linthicum, Maryland. THIS ROLE IS CONTINGENT UPON AWARD WIN WITH AN ANTICIPATED START DATE OF JUNE 2026

Requirements

  • Bachelors in STEM discipline with 5 years of related experience, or a Master’s Degree with 3 years of related experience, or a PhD with 0 years of related experience (Level 3 education requirements)
  • Experience designing, architecting, and using various FPGAs in processor designs (knowledge of VHDL or other high level language a plus)
  • Experience defining and executing development test plans and/or methods
  • Must be a U.S. citizen
  • No clearance required to start, but must have the ability to obtain and maintain a DoD Top Secret Clearance
  • Bachelors in STEM discipline with 8 years of related experience, or a Master’s Degree with 6 years of related experience, or a PhD with 3 years of related experience (Level 4 education requirements)
  • Digital subsystem, ASIC, FPGA and/or digital board development experience and knowledge essential
  • Candidate must have good communication skills, strong interpersonal skills, and good oral and written presentation skills
  • Must be able to mentor and coach early career Engineers as needed
  • Must be U.S Citizen
  • Must be able to obtain and maintain Secret or Top-Secret level security clearance, per business requirements

Nice To Haves

  • Active DoD Top Secret Clearance
  • Experience translating customer requirements into functional block diagrams that can be realized as FPGAs or other Digital Logic Circuit Card Assemblies
  • Strong experience with Matlab and Simulink modeling and programming
  • Develops detailed specifications from high level design goals and performs analysis of the hardware, system environment and design goals to enable selection and implementation of the desired system topology
  • Can clearly present assigned work at program technical reviews, proposals, or other technical meetings
  • Possesses strong interpersonal skills to work effectively within a development team to understand system level inter-dependencies and design constraints
  • Conduct trade studies, identify and present alternate design options
  • Experience with Systems Engineering principles

Responsibilities

  • Develop digital logic designs for space applications such as satellite command and control and sensor data processing
  • Design, development, creation and modification of digital logic designs implemented with Xilinx and Microsemi FPGA IDEs
  • Simulation and verification of FPGA logic designs, compliance requirements, and supporting validation at the system level
  • Work with members of multi-functional teams to develop innovative solutions
  • Clear and effective communication to cross-functional team members
  • Documentation of design and analysis reports as well as test reports

Benefits

  • health insurance coverage
  • life and disability insurance
  • savings plan
  • Company paid holidays
  • paid time off (PTO) for vacation and/or personal business
  • overtime
  • shift differential
  • discretionary bonus
  • Annual bonuses
  • Long Term Incentives (for VP or Director positions)
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service