FPGA Design Engineer
About The Position
Hewlett Packard Enterprise is hiring an FPGA Design Engineer to develop RTL for Xilinx (AMD) FPGA and/or Lattice CPLD designs used in complex compute, switch, or storage board designs. The role includes selecting appropriate parts based on cost, complexity, longevity, expandability, and other criteria; designing hardware controls; and working with power sequencing, control, and monitoring of LSI and ASIC devices. The engineer will simulate, synthesize, and validate timing for Verilog RTL; create IP for interface controllers and other required functionality; review designs with design and operations teams; and contribute to schematic reviews under HPE’s product design, development, and release processes. The role also involves generating programming models, collaborating with firmware engineers on driver development, and working with board engineers on printed circuit assembly bring-up and testing. The position includes leading or supporting debug of development and field issues, documenting investigations and resolutions, collaborating with HPE partners and vendors on requirements and co-development or debug, and working with FPGA vendors to understand roadmaps and new IP developments. This is an onsite role, with an expectation of primarily working from an HPE office. Some travel may be required.
Requirements
- Bachelor's or Master's degree in Electrical Engineering.
- At least 4 years of experience writing RTL for FPGAs for complex compute boards and/or ASIC designs.
- Ability to read and understand complex digital board schematics.
- Ability to work independently and within design teams on multiple projects.
- Ability to use laboratory equipment, scopes, and analyzers to debug complex problems.
- Ability to work successfully with engineers across geographies to meet design requirements and schedules.
- Excellent written and verbal communication skills.
Nice To Haves
- Experience with BMC controllers and management interfaces for CPU or GPU types, and hardware management protocols such as I2C, SMBUS, JTAG, SPI, LPC, Wishbone, eSPI, PCIe, and Ethernet.
- Knowledge of server-grade x86 and/or ARM processors and/or GPU processors.
- Experience with Xilinx Spartan 6, Spartan 7, or Artix 7 families.
- Willingness to travel as required.
Responsibilities
- Develop RTL for Xilinx (AMD) FPGA and/or Lattice CPLD designs.
- Select appropriate parts for designs based on criteria such as cost, complexity, longevity, and expandability.
- Design hardware controls and work with sequencing, control, and monitoring of LSI and ASIC devices in compute, switch, or storage board designs.
- Perform simulation, synthesis, and timing validation in Verilog RTL.
- Create IP for interface controllers and other required functionality.
- Conduct design reviews with design and operations teams and contribute to team schematic design reviews under HPE product design, development, and release processes.
- Generate programming models and work with firmware engineers on driver development.
- Work with board engineers on printed circuit assembly bring-up and testing.
- Lead or support debugging of development and field issues, and track and document issue discovery, investigation plans and results, resolution, and closure in issue-tracking databases.
- Work with HPE partners and vendors to define requirements and support co-development or debugging efforts.
- Work with FPGA vendors to understand roadmaps and new IP developments.
Benefits
- Comprehensive benefits supporting physical, financial, and emotional wellbeing for employees and their loved ones.
- Programs supporting personal and professional development and career goals.
- Variable incentives may also be offered.
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
