FPGA Design Engineer II

HPR•Needham, MA

1d•$129,000 - $166,000•Onsite

About The Position

HPR is a leading provider of high-performance and ultra-low latency electronic trading and capital markets infrastructure solutions offered as a managed service. Our cutting-edge technology is used by tier-1 financial institutions to monitor and execute trades rapidly and efficiently. As we continue to innovate and grow, we’re searching for a forward-thinking FPGA Design Engineer to help us build the future of capital markets infrastructure.

Requirements

BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related
3+ years of experience in digital logic design for FPGAs or ASICs
Proficiency in SystemVerilog (preferred) or VHDL
Deep understanding of computer architecture and digital design concepts
Experience with industry-standard simulation and debugging tools (e.g., VCS, Verdi)
Comfortable working in a Linux environment
Strong problem solving, debugging, and communication skills

Nice To Haves

Experience working with Xilinx and/or Altera FPGAs
Familiarity with FPGA architecture and advanced design techniques, including optimizations for synthesis and timing closure
In-depth knowledge of networking protocols (IP, TCP, UDP)
Experience with high-speed interfaces (PCIe, Ethernet, and/or DDR)
Familiarity with C programming and scripting in Python and/or Perl

Responsibilities

Design, develop, optimize, and maintain high-performance FPGA compute and networking systems used in electronic trading
Own the RTL design process from specification and coding through synthesis and FPGA implementation
Partner with design verification engineers to review and execute comprehensive test plans
Lead and mentor junior engineers, promoting our culture of continuous learning and collaboration
Contribute to improving our development processes, tools, and methodologies