Failure Analysis Intern

MACOM • Durham, NC

1d

About The Position

As a member of the Technology Development team, the Semiconductor Process & Device Failure Analysis Intern will work alongside experienced engineers and receive mentoring, guidance, and introductions to colleagues. Over the 12-week internship, the intern will complete an individual, well-defined project with set outcome goals, gain hands-on experience, receive training and ongoing supervision, attend an intern webinar series and networking/social events, and present project successes and pitfalls at a poster session. The intern will also receive formal written feedback.

Candidates must be U.S. Persons under ITAR regulations. MACOM is an Equal Opportunity Employer and provides reasonable accommodations to qualified individuals with disabilities.

Requirements

• Currently enrolled in a Master's or doctoral degree program in materials science and engineering (MSE), electrical and computer engineering (ECE), or a similar engineering program.
• Excellent oral and written communication skills.
• Must qualify as a U.S. Person under ITAR regulations: a U.S. citizen, U.S. national, lawful permanent resident, or individual granted asylum or refugee status.

Nice To Haves

• Familiarity with electronic device fabrication processing technology and device mask layout principles.
• Familiarity with epitaxial growth of GaN high electron mobility transistors (HEMTs) on SiC and silicon substrates.
• Prior experience with electrical probe testing/curve tracing and high-resolution optical microscopy.
• Understanding of the capabilities of acoustic microscopy, focused ion beam (FIB) cross-sectioning, secondary electron microscopy (SEM) inspection, and scanning transmission electron microscopy (STEM) analysis.
• Versatility with Microsoft Office and statistical analysis software such as JMP.
• Direct experience with one or more of the listed characterization techniques.
• Familiarity with radio-frequency transistor device principles and characterization.
• Ability to view .gds files in a layout editor and familiarity with mask layout principles.
• Familiarity with epitaxial wafer characterization methods such as sheet resistance mapping and photoluminescence mapping.

Responsibilities

• Complete an individual, well-defined project with set outcome goals.
• Gain hands-on experience while working alongside experienced engineers.
• Present project data and findings verbally and in written reports.
• Present project successes and pitfalls at an intern poster session.
• Attend the intern webinar series and networking/social events.

Benefits

• Mentoring and guidance from experienced engineers.
• Hands-on experience, training, and ongoing supervision.
• Invitation to an intern webinar series.
• Networking and social events.
• Opportunity to present at a poster session.
• Formal written feedback.

What This Job Offers

• Career Level: Intern