Engineer NAND CMOS PI

Micron • Boise, ID

22h

About The Position

Set the direction for current and future CMOS technology for company’s NAND Memory Technology Roadmap. Work with the design team to set electrical targets and define transistor structures to meet these targets. Guide the device technology development and be in close relation with process integration, design engineering, design, design rules, reliability, transistor modeling, TCAD (Technology Computer-Aided Design), and Parametric test. Ensure that the developed technology is manufacturable and highly yielding and that these considerations are designed into the technology from the start. Shape and execute NAND-CMOS roadmap and make sure to align to product roadmaps. Improve device portfolio, both in performance and cost effectiveness. Define, execute, and analyze silicon experiments for future device generations. Interface with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained design rules. Work with TCAD simulation group to develop strategies for transistor structures to meet targets. Ensure that transistor models are correctly targeted to anticipate final silicon. Define electrical test structures for transistors, isolation, design rule verification, and process monitoring. Ensure transistors are developed meeting the required reliability standards. Collaborate with manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues. Mentor less experienced colleagues.

Requirements

• CMOS device design, simulation, and characterization
• Developing advanced logic transistor technologies
• Developing Analog FETs operating at Higher Voltages
• Analog design concepts
• Design Technology Co Optimization (DTCO)
• Electrical Characterization & PDK/VDL Development

Responsibilities

• Set the direction for current and future CMOS technology for company’s NAND Memory Technology Roadmap.
• Work with the design team to set electrical targets and define transistor structures to meet these targets.
• Guide the device technology development and be in close relation with process integration, design engineering, design, design rules, reliability, transistor modeling, TCAD (Technology Computer-Aided Design), and Parametric test.
• Ensure that the developed technology is manufacturable and highly yielding and that these considerations are designed into the technology from the start.
• Shape and execute NAND-CMOS roadmap and make sure to align to product roadmaps.
• Improve device portfolio, both in performance and cost effectiveness.
• Define, execute, and analyze silicon experiments for future device generations.
• Interface with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained design rules.
• Work with TCAD simulation group to develop strategies for transistor structures to meet targets.
• Ensure that transistor models are correctly targeted to anticipate final silicon.
• Define electrical test structures for transistors, isolation, design rule verification, and process monitoring.
• Ensure transistors are developed meeting the required reliability standards.
• Collaborate with manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues.
• Mentor less experienced colleagues.

Benefits

• choice of medical, dental and vision plans
• benefit programs that help protect your income if you are unable to work due to illness or injury
• paid family leave
• robust paid time-off program
• paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Senior