Engineer II - Digital ASIC Design

Microchip•San Jose, CA

12d•Onsite

About The Position

Microchip Technology Inc. is seeking an Engineer II - Digital ASIC Design to join their team. This role offers a unique opportunity to be part of a large, global organization that designs technology powering the world. The company fosters an atmosphere of trust, empowerment, respect, diversity, and communication, providing opportunities for growth and stability. Microchip is known for its commitment to employee development, values-based decision making, and strong sense of community, with nationally-recognized Leadership Passage Programs. The company has a history of record revenue and over 30 years of quarterly profitability, driven by a dedicated team focused on innovation.

Requirements

2.5 - 5 years of proven experience in ASIC or FPGA digital design.
BS degree in Electrical Engineering
Proficiency in System Verilog and a deep understanding of synchronous/asynchronous design techniques.
Experience with the full Cadence/Synopsys front-end EDA flow (e.g., VCS, SpyGlass, Design Compiler, PrimeTime).
Skillful in scripts to aid efficiency
Post-silicon validation or bring-up experience.
Proficient in lab equipment (e.g., oscilloscope, logic analyzer, ..., etc.)

Nice To Haves

Familiarity with PHY or Serdes protocols, knowledge of IEEE 802.3 is a plus

Responsibilities

Follow the micro-architecture and implement RTL (System Verilog) of complex digital IP blocks from concept to delivery.
Drive Power, Performance, and Area trade-offs and optimizations to meet aggressive product targets.
Collaborate with SoC integration teams to ensure seamless connectivity and address top-level timing/congestion issues.
Lead Lint, CDC, RDC, and formal verification efforts.
Work closely with Physical Design teams to close timing and resolve routing bottlenecks.
Cooperate with teams to verify and validate module and system functions.
Organize documents to record design activities.