Engineer II-Design

Microchip Technology Inc.•Allentown, PA

About The Position

As a member of Microchip’s engineering community, the Engineer II-Design designs, simulates, and verifies RTL-based blocks for Microchip devices. The devices are systems-on-chip containing hard and soft IP blocks that support industry-standard protocols for imaging, networking, system connectivity, compute, and data storage.

Requirements

  • 2–5 years of experience in RTL design for ASIC implementation.
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • Coursework and practical application of high-speed RTL design.
  • Experience with RTL design tools for design entry, synthesis, formal verification, RTL/gate-level simulation, cross-domain clocking analysis, and static timing analysis.
  • Coursework and practical use of RTL design, design verification, synthesis, and formality.
  • Proficiency in SystemVerilog.
  • Coursework and practical use of static timing analysis and Verilog simulation tools.
  • Ability to design complex state machines and data-path logic.
  • Proficiency in scripting languages such as TCL, Perl, or Python, and in Linux.
  • Ability to understand and implement industry standards.
  • Ability to write detailed design specifications.
  • Good analytical, oral, and written communication skills.
  • Ability to create clean, readable presentations.
  • Self-motivated, proactive team player.
  • Ability to work to schedule requirements.
  • Must provide proof of U.S. citizenship, permanent U.S. residency, or protected-individual classification under 8 USC 1324b(a)(3), because the role requires access to technology, materials, software, or hardware controlled by U.S. export laws.

Nice To Haves

  • Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • FPGA and ASIC system-on-chip design experience.
  • Laboratory experience in system-level validation.
  • Experience with FPGA design and board implementation tools.

Responsibilities

  • Develop RTL and ASIC designs.
  • Create detailed module designs, perform performance analysis, and produce detailed design specifications.
  • Participate in RTL implementation, synthesis, simulation, and pre-layout and post-layout timing verification.
  • Apply high-speed design techniques to improve data and command processing bandwidth, reduce latency, and increase reliability.
  • Support porting designs to test chips and emulation platforms.
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