Emulation Lead/Principal Engineer

TYLsemi • San Jose, CA

5d • $237,500 - $286,000

About The Position

Build the platform that brings silicon to life before tapeout. TYLsemi is developing purpose-built connectivity chiplet for HPC/rack-scale AI systems. We are seeking a Principal Engineer Emulation Lead to create scalable pre-silicon environments that enable firmware, software, and system validation months before first silicon arrives. You'll build production-grade platforms that boot real software, run meaningful workloads, expose system bottlenecks, and accelerate product readiness across the organization.

Requirements

• 10+ years of ASIC/SoC development experience with significant emulation ownership.
• Expertise with commercial emulation platforms (Palladium, ZeBu, or Veloce).
• Strong RTL skills in Verilog/SystemVerilog.
• Experience with firmware bring-up, embedded processors, interrupts, and system debug.
• Proficiency in C/C++ and scripting with Python.
• Excellent cross-functional debugging and technical leadership skills.
• Proven track record leading complex verification and emulation programs.

Nice To Haves

• Ethernet, PCIe, CXL or high-speed interconnects.
• FPGA prototyping (Protium, HAPS, etc.).
• Security architectures, Root of Trust, and secure boot.
• First-silicon bring-up and system qualification experience.

Responsibilities

• Architect and deploy full-chip, multi-die, and subsystem emulation environments using Palladium, ZeBu, Veloce, or similar platforms.
• Enable pre-silicon bring-up of boot ROM, firmware, drivers, operating systems, and application workloads.
• Develop scalable emulation methodologies and reusable infrastructure.
• Drive system-level validation, performance analysis, and root-cause debug across RTL, firmware, software, and verification.
• Build automation, CI/CD workflows, regressions, and release processes that scale across engineering teams.
• Partner with architecture, design, verification, firmware, DFT, and post-silicon teams to reduce product risk before tapeout.
• Influence methodology, observability, debugability, and overall silicon readiness.
• Lead complex debug spanning RTL, firmware, software, and hardware platforms.
• Mentor engineers and influence architecture to improve observability, diagnosability, and product quality.

Benefits

• You'll work at the intersection of silicon, software, and systems, helping bring cutting-edge AI and data-center products to life while influencing architecture and product quality from day one.
• If you're passionate about hardware/software co-validation, large-scale emulation, and building world-class silicon platforms, we'd love to hear from you.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal
• Education Level: No Education Listed