Summer 2027 - Electrical Engineering Internship, FPGA

CesiumAstro•Melbourne, FL

21h•Onsite

About The Position

CesiumAstro is seeking Summer 2027 FPGA interns to apply digital design and verification principles to FPGAs for satellite communication systems. Interns work closely with CesiumAstro engineers through multiple phases of FPGA development and focus primarily on either FPGA design or FPGA verification, depending on project needs, experience, and interests. FPGA design assignments may include developing and testing RTL for high-speed serial interfaces and data streams, digital processing cores, multiple clock domains, and management interfaces. FPGA verification assignments may include developing testbenches and verification environments, creating test scenarios, generating constrained-random stimulus, checking expected behavior, debugging failures, and measuring verification coverage. Assignments are determined by project availability and candidate interests. Prior FPGA-specific coursework or experience is not required; candidates should have a strong foundation in digital design or software-based verification concepts and an interest in applying those skills to FPGA development. Interns present their work to peers, mentors, and CesiumAstro executive leadership throughout the summer. The internship is compensated competitively and located onsite at a CesiumAstro facility. Applicants must meet the stated U.S. space technology export eligibility requirements. Applicants are asked to include a cover letter describing their interest in digital design, FPGA development or verification, and space systems or communication systems, as well as their U.S. citizenship or permanent resident status.

Requirements

Be currently enrolled in a BS, MS, or PhD program in Electrical Engineering or Computer Engineering at an accredited university.
Understand fundamental digital design concepts, including combinational and sequential logic, finite state machines, timing, and synchronous digital systems.
Have digital design or hardware-description experience gained through coursework, research, personal projects, competition teams, internships, or other technical activities.
Demonstrate the ability to approach technical problems methodically, learn new concepts, and debug complex systems.
Have excellent written and verbal communication skills.
Meet U.S. Government Space Technology Export Regulations eligibility requirements: be a U.S. citizen, lawful permanent resident, conditional resident, asylee, or refugee as defined by 8 U.S.C. 1324b(a)(3), or be eligible to obtain required U.S. Department of State authorizations.
Include a cover letter describing interest in digital design, FPGA development or verification, and space systems or communication systems, and stating U.S. citizenship or permanent resident status.

Nice To Haves

FPGA development or verification experience through coursework, research, internships, personal projects, or extracurricular activities.
Experience with SystemVerilog, Verilog, VHDL, or UVM.
Experience with FPGA or HDL development tools such as AMD/Xilinx Vivado, Questa/ModelSim, or similar tools.
Experience in digital signal processing.
Experience with embedded systems or board-level digital hardware.
Coursework or experience in communication systems.

Responsibilities

Apply digital design and verification principles to FPGAs for satellite communication systems.
Work with CesiumAstro engineers through multiple phases of FPGA development.
Depending on assignment, develop and test RTL for high-speed serial interfaces, data streams, digital processing cores, multiple clock domains, and management interfaces.
Depending on assignment, develop testbenches and verification environments; create test scenarios; generate constrained-random stimulus; check expected behavior; debug failures; and measure verification coverage.
Present internship work to peers, mentors, and CesiumAstro executive leadership.