eCad Electrical Engineer - Level 4 - Dulles

Northrop Grumman•Dulles, VA

2d•$177,000 - $265,600•Onsite

About The Position

Northrop Grumman's Space Sector is seeking an eCad Electrical Engineer – Level 4 in Dulles, VA, to join their collaborative teams. This position is 100% onsite and focuses exclusively on board-level PCB layout design for high-reliability, multilayer circuit boards for spaceflight hardware, applying best practices and aerospace standards. The role involves working closely with design engineers to implement precise layouts, optimize for space environments, and ensure adherence to aerospace standards. This position operates on a 9/80 schedule, with every other Friday off.

Requirements

Bachelor’s degree with 12 years of professional PCB layout experience – OR – Master’s degree with 10 years of professional experience – OR – PhD with 8 years of professional experience.
No clearance required to start
Proven experience with Cadence Allegro PCB Designer in an aerospace, medical, or other high-reliability environment.
Experience with creating and managing ECAD libraries (symbols/footprints).
Demonstrated expertise in multilayer board layout with signal integrity and power integrity in mind.
U.S. Citizenship.
Demonstrated leadership in layout design for flight boards or mission-critical systems.
Experience with IPC CID or CID+ certification or equivalent layout training.

Nice To Haves

IPC CID or CID+ Certification.
Experience with NASA-STD-8739.x, IPC-6012, and ECSS standards.
Experience with RF layout best practices (e.g., maintaining return path integrity, shielding, and connector placement).
Familiarity with designing for radiation environments and space qualification processes.
Proficiency with constraint-driven design, stackup development, and controlled impedance routing.
Experience with thermal/mechanical analysis coordination for layout decisions.
Prior experience designing layouts for space-rated programs including DoD, NASA, or commercial LEO/GEO missions.

Responsibilities

Own the end-to-end PCB layout process using Cadence Allegro PCB Designer.
Develop multilayer, high-density interconnect (HDI) and controlled impedance layouts optimized for space environments.
Create and maintain PCB symbols, footprints, and padstacks in accordance with internal library standards.
Work closely with electrical and mechanical engineer to ensure layout meets electrical, mechanical, and thermal constraints.
Implement high-speed routing techniques including differential pairs, length tuning, and EMI/EMC compliance practices.
Support RF and mixed-signal layout requirements, including: Controlled impedance and matched-length RF signal traces, Proper isolation and grounding strategies for RF sections, Minimization of parasitic effects, signal loss, and coupling across layers, Placement and routing for connectors, antennas, or filters used in RF paths.
Incorporate blind/buried vias, microvias, and stackup design for rigid/flex and complex assemblies.
Generate fabrication (Gerber, ODB++) and assembly files, release documentation, and participate in design reviews.
Apply NASA-STD-8739 and IPC-2221/2222 layout standards for space-rated hardware.
Participate in DFM/DFX reviews with manufacturing partners to ensure layout readiness for fabrication and assembly.
Collaborate with engineers to define layout constraints, clearance rules, and placement strategies.
Drive quality through internal peer reviews, ECAD checklist adherence, and continuous layout optimization.
Other duties as assigned