DSP Micro-Architect RTL Engineer

Qualcomm • Austin, TX

1d • $101,400 - $152,200

About The Position

As a Qualcomm ASIC Engineer, you will help define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high-performance, high-quality, low-power products. Engineers collaborate with cross-functional groups to determine product execution paths. This role supports the development of architectures, circuit specifications, logic designs, and system simulations based on system-level requirements, and assists with implementation strategies that meet system requirements and customer needs.

The position evaluates design flows from high-level design through synthesis, place and route, timing and power analysis, and verification, or comparable custom-circuit design and layout flows. It uses tools and applications such as RTL-to-GDS Flow and Virtuoso to support architecture and design work on a part of a block, SoC, or IC package, and produces technical documentation for EDA/IP/ASIC projects. The role works under supervision, with decisions affecting the employee’s direct area of work or work group.

Requirements

• Bachelor’s degree in Science, Engineering, or a related field.
• 6+ months of experience with architecture and design tools.
• 6+ months of experience with scripting tools and programming languages.
• 6+ months of experience with design verification methods.

Nice To Haves

• Master’s degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.

Responsibilities

• Assist with defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development for high-performance, high-quality, low-power products.
• Assist in creating architectures, circuit specifications, logic designs, and system simulations based on system-level requirements.
• Collaborate with team members to help develop implementation strategies that meet system requirements and customer needs.
• Support evaluation of the process flow from high-level design through synthesis, place and route, timing and power analysis, and verification, or comparable custom-circuit design and layout flows.
• Use tools and applications, such as RTL-to-GDS Flow and Virtuoso, to enable architecture and design of a specific part of a block/SoC or IC package.
• Write technical documentation for EDA/IP/ASIC projects.

Benefits

• Competitive annual discretionary bonus program.
• Opportunity for annual RSU grants; employees on sales-incentive plans are not eligible for the annual bonus.
• Competitive benefits package designed to support employees at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level