DSP Integration Test Engineer

AttoTude•Menlo Park, CA

9d•$150,000 - $250,000

About The Position

AttoTude’s engineering team develops next-generation baseband modems for intra-DCI applications. As a member of the system test team, the DSP Integration Test Engineer owns bring-up, integration, and hardware maturity of high-speed DSPs coupled with AttoTude’s proprietary DiAx cable technology. The role works with early prototypes to bring up transmit and receive DSP functions on hardware and characterize the combined performance of AttoTude’s 448Gbps/PAM4 AEC modules. It requires evaluating tradeoffs across DSP, analog, and RF subsystems to optimize system performance and carry results through to volume production. The engineer frequently interacts with design engineers on signal processing and performance optimization, and designs, debugs, and optimizes firmware algorithms to maintain robust performance across varying link conditions. The role is pivotal in transitioning AttoTude’s next-generation communications platform from prototypes to volume production. It includes hardware bring-up and maturation, DSP and converter characterization, calibration and control-loop development, link-performance analysis, Python-based lab automation, and performance validation and qualification. The engineer collaborates with DSP design, DiAx cable design, firmware/controls, and hardware teams, providing experimental feedback to architecture, design, and manufacturability decisions and helping transition performance gains into the product. Annual salary range: $150,000–$250,000 USD.

Requirements

MSEE minimum, with specialization in high-speed electronic or electro-optic communication systems.
At least 5 years of relevant industry experience with an MSEE, or at least 3 years with a PhD.
Experimental experience bringing up and maturing high-speed DSPs in hardware, using coherent modulation (such as QPSK, 16QAM, or 64QAM) or multilevel PAM (such as PAM4).
Foundational understanding of transmit- and receive-side DSP blocks, especially equalizers such as FFE, DFE, and MLSE and their tradeoffs, as well as clock and carrier recovery.
Hands-on experimental experience measuring high-speed DACs and ADCs.
Experience developing calibration methods and transferring them to manufacturing test.
Experience developing and/or testing DSP-based control loops.
Performance validation and productization experience, including transfer to volume production.
Proficiency with high-speed laboratory equipment such as real-time and sampling oscilloscopes, BERTs, arbitrary waveform generators, and spectrum and phase-noise analyzers.
Programming experience in Python and Matlab for laboratory automation, modeling, and data analysis.
Excellent written and oral communication skills, including the ability to clearly and concisely communicate complex information across multiple platforms and modalities.
Resourceful collaborator who supports teammates and colleagues as needed.

Nice To Haves

PhD in Electrical Engineering or Applied Physics.
Prior work experience with coherent optical modules or 224 Gbps/PAM4 AEC modules.
Familiarity with industry standards such as OIF 400ZR/800ZR, OIF CEI-224G, or IEEE 802.3dj.
Understanding of forward error correction, such as RS/KP4 or soft-decision FEC, and its interaction with DSP performance.
Experience characterizing RF and mm-wave components, including S-parameters and nonlinear compression, and modeling linear and nonlinear signal impairments.
Familiarity with module management and telemetry interfaces such as CMIS and firmware-based monitoring.
Familiarity with RTL/Verilog or hardware-oriented algorithm implementation.
Fluency with statistical analysis methods and software repositories/tools such as GitHub, GitLab, Bitbucket, or Docker.
C/C++ programming experience.

Responsibilities

Bring up and mature high-speed DSPs on prototype and production hardware, including transmit and receive data-path configuration, link optimization, troubleshooting, and debugging.
Characterize and optimize transmit and receive DSP blocks, including feed-forward and decision-feedback equalizers, MLSE, and clock recovery; assess performance, complexity, and power tradeoffs.
Measure high-speed DACs and ADCs, including ENOB, SNDR, linearity, interleaving spurs, bandwidth, jitter, and phase noise, and quantify their impact on modem SNR and BER.
Develop calibration methods and transfer them to automated manufacturing test.
Develop and test DSP-based control loops, including adaptation convergence, loop stability, tracking, and robustness across process, voltage, and temperature.
Analyze link performance, including pre-FEC BER and SNR, and correlate measurements with system models.
Develop Python-based lab automation for testing, characterization, and data analysis.
Drive performance validation and qualification, and transfer DSP configurations, calibrations, and test procedures to volume production.
Work with DSP design, DiAx cable design, firmware/controls, and hardware teams to provide experimental results that inform architecture, design, and manufacturability decisions and transition performance improvements into the product.
Design, debug, and optimize firmware algorithms that maintain robust performance under varying link conditions.