DMTS, DRAM Systems

Micron Technology•San Jose, CA

5d•$216,000 - $430,000

About The Position

Micron Technology is seeking a Distinguished Member of Technical Staff (DMTS) to lead architecture analysis for AI, cloud, and enterprise platforms, spanning memory devices through racks and data centers. The role connects DRAM architecture, device organization, electrical, thermal, and power behavior with system modeling and analysis, translating findings into product and roadmap decisions for future DRAM, LPDDR, HBM, CXL, SSD, and disaggregated memory solutions. The successful candidate will analyze DRAM and LPDRAM components and circuit designs across competitive products and develop forward-looking direction for architecture and design teams. The role includes evaluating technology tradeoffs, optimizing across the hardware and software stack, and making actionable recommendations to architecture teams and business stakeholders. The DMTS will serve as a recognized technical authority, influence decisions across multiple business units, define long-term modeling and simulation strategy, mentor senior architects and engineers, and represent Micron in standards bodies and industry initiatives. The role also applies Micron-approved AI tools to architecture work and improves modeling and analysis workflows, with human review and responsible checks of AI-generated results. This is a full-time position. The estimated US base salary range is $216,000 to $430,000 per year. Additional compensation may include benefits, bonuses, and equity. Micron offers medical, dental, and vision plans; income-protection programs; paid family leave; paid time off; and paid holidays.

Requirements

PhD or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.
15 or more years of experience in memory or storage architecture, system architecture, or performance engineering.
Deep expertise in memory or storage systems, from device and electrical behavior through system-level performance.
Demonstrated ability to influence product direction through quantitative analysis.
Strong record of patents, publications, or industry technical leadership.
Ability to translate complex analysis into clear recommendations for architecture and business stakeholders.
Ability to own decisions involving AI and apply responsible AI use and AI governance policies.

Nice To Haves

Experience across volatile and non-volatile memory, such as DRAM, HBM, NAND, or SSD, and understanding of their interaction in the memory and storage hierarchy.
Knowledge of DRAM device topology, channel/rank/bank behavior, timing, training, signaling, and package-level effects.
Hands-on experience applying AI/ML or GenAI to performance modeling, workload characterization, data analytics, or engineering productivity.
Experience with memory or SSD controller architecture, firmware, ECC and RAS, or thermal and power management.
Experience working with product planning or business units to influence roadmaps.

Responsibilities

Analyze DRAM architecture, device organization, layout effects, electrical margins, signaling, thermal behavior, power, and performance across memory technologies and competitive products.
Assess how device- and component-level characteristics affect system-level performance.
Compare memory generations, configurations, and competing solutions to identify performance, power, cost, and architectural gaps.
Quantify tradeoffs involving cost per GB, power efficiency, latency, bandwidth, reliability, thermals, and controller and platform complexity.
Drive optimization across applications and frameworks, operating systems and runtime software, memory controllers and firmware, memory and storage subsystems, and network fabrics.
Recommend memory features, controller requirements, training flows, power management, reliability and RAS capabilities, and internal development priorities.
Influence architecture decisions across business units and partner with architecture, firmware, validation, product engineering, and business teams to define data requirements and findings.
Produce competitive assessments and executive-level recommendations.
Define long-term modeling and simulation strategy and mentor senior architects and engineers.
Represent Micron in standards bodies, ecosystem initiatives, academic collaborations, and industry conferences.
Use Micron-approved AI tools for workload analysis, modeling, competitive assessment, and technical documentation.
Redesign modeling and analysis workflows to automate repetitive work while defining human review points and escalation paths.
Review AI-generated model outputs, data summaries, and competitive insights for accuracy, bias, and relevance before they inform decisions.
Build data-backed views of internal and competing technologies, establish modeling capability used for roadmap decisions, rank key gaps, influence product definitions, and improve the speed or quality of analysis through AI-enabled workflows.