Distinguished Engineer, Power Architecture

NVIDIA•Santa Clara, CA

About The Position

Join NVIDIA's Applied Power Architecture team and help define the perf/watt standards of our innovative silicon and systems across many domains. As a Distinguished Engineer, Power Architecture, you'll develop the long-term technical strategy for power architecture. This includes datacenter GPUs, GeForce and client products, automotive (DRIVE), robotics (Jetson, Isaac), and the broader edge-AI portfolio. This role suits a recognized expert who has personally crafted the power architecture of multiple successful silicon generations and is ready to lead the next decade of perf/watt advancement at NVIDIA. This is your chance to join a company that continually expands the possibilities of technology and innovation!

Requirements

MSEE, MSCE, or PhD or equivalent experience demonstrating significant impact in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
18+ years of relevant industry and/or academic experience.
Demonstrated ownership of power architecture across several successful silicon generations—server-class, client/mobile-class, or thermally-constrained SoC platforms.
Took personal responsibility for decisions that significantly developed product outcomes.
Deep, applied expertise in the full stack of low-power and energy-efficient design techniques.
Authoritative understanding of modern GPU, CPU, and accelerator architectures; high-speed interconnects (NVLink, PCIe, Ethernet, optical, automotive networks); memory subsystems (HBM, LPDDR, on-die SRAM); and the system, OS, runtime, firmware, and workload layers that determine real-world perf/watt.
Proven history of developing and implementing power and performance modeling methods, important metrics, and tools widely used across the engineering organization. This includes projections before silicon creation and detailed validation after silicon production.
Demonstrated experience defining requirements with — and architecting power solutions across — internal silicon teams and external silicon, IP, foundry, or packaging partners.

Nice To Haves

Own the architecture for power and thermal development in a leading GPU, AI accelerator, mobile SoC, automotive SoC, robotics SoC, or large-scale server SoC with significant shipment volume.
Experience driving model-to-hardware co-optimization for perception, ML, or graphics workloads on power- and thermally-constrained platforms.
Background co-designing silicon with platform-level power delivery and cooling. This ranges from rack- and row-scale liquid or immersion cooling at the datacenter end. It also includes passively cooled and battery-constrained envelopes at the edge.
Published research or production work applying ML to power/performance modeling, workload characterization, or DVFS/AVFS strategies at scale.
Deep roots in RTL, microarchitecture, or backend implementation that allow you to operate fluently from architectural intent down to build realization with history of mentoring engineers into Principal- and Distinguished-level roles, and of building durable technical communities in power, performance, or architecture.

Responsibilities

Set multi-generation, cross-portfolio power strategy.
Own perf/watt across server-, client-, and edge-class platforms.
Drive performance-versus-power analysis that influences major silicon trade-offs and product roadmap decisions.
Lead silicon and vendor/IP co-architecture.
Define new technology frontiers.
Architect thermal and system-level power management end-to-end.
Drive ML- and workload-aware modeling and post-silicon optimization.
Influence across the company and the industry.
Develop the next generation of technical leaders.
Generate sustained IP and intellectual contribution.