Director Design Engineering

GlobalFoundries•Austin, TX
•$191,000 - $332,000

About The Position

GlobalFoundries is seeking an experienced Director of Design Engineering to lead development and execution of complex SoC programs across advanced semiconductor technologies. The role drives architectural execution, front-end design methodology, and cross-functional collaboration to deliver differentiated silicon solutions from concept through tape-out and productization. The Director leads complex SoC, AI/ML, networking, compute, or edge-processing products; oversees front-end development from architecture definition through RTL implementation, integration, synthesis, timing closure, and tape-out readiness; and establishes design methodologies, quality metrics, and execution frameworks. The role guides technical decisions involving performance, power, area, reliability, manufacturability, and product cost, and partners with architecture teams to assess product concepts and technology feasibility. The role builds and develops high-performing design organizations across disciplines and geographies, including capabilities in architecture, RTL, integration, verification, DFT, physical design, and silicon bring-up. It collaborates with internal teams, customers, ecosystem partners, IP providers, EDA vendors, foundries, and technology partners, aligning technical execution with business objectives, schedules, and product roadmaps. The Director also defines design strategies for advanced technologies and drives adoption of advanced methodologies, low-power architectures, chiplet integration, 2.5D/3D packaging, and emerging AI-driven design flows. The employee is expected to perform all activities safely and responsibly and support Environmental, Health, Safety & Security requirements and programs.

Requirements

  • Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
  • 15+ years of semiconductor design experience with progressive technical and leadership responsibility.
  • 8+ years of engineering management experience, including leadership of senior technical teams.
  • Proven track record of delivering multiple successful ASIC/SoC tape-outs across advanced technology nodes.
  • Strong hands-on expertise in front-end design, including RTL design and integration, microarchitecture development, synthesis, CDC/Lint, DFT and test methodologies, timing closure, and design-verification collaboration.
  • Deep understanding of complete RTL-to-GDSII development flows.
  • Demonstrated experience with large-scale, complex SoC designs involving multiple IPs, subsystems, and cross-functional teams.
  • Strong customer-facing and executive communication skills.

Nice To Haves

  • Experience delivering products on advanced technology nodes such as 7nm, 5nm, 3nm, and beyond.
  • Experience with AI/ML accelerators, compute platforms, networking, automotive, or high-performance computing products.
  • Familiarity with advanced packaging technologies including chiplets, 2.5D, and 3D integration.
  • Experience working directly with leading foundries and ecosystem partners.
  • Understanding of low-power design methodologies, power management, and system-level optimization.
  • Background in customer engagements, strategic partnerships, and technology roadmap development.

Responsibilities

  • Lead the design and execution of complex SoC, AI/ML, networking, compute, or edge-processing products.
  • Drive front-end development from architecture definition through RTL implementation, integration, synthesis, timing closure, and tape-out readiness.
  • Establish and enforce design methodologies, design quality metrics, and execution frameworks.
  • Use modern AI flows and methodologies for agile, fast design development.
  • Guide technical decisions involving performance, power, area (PPA), reliability, manufacturability, and product cost.
  • Partner with architecture teams to evaluate product concepts and technology feasibility.
  • Build, mentor, and lead high-performing design teams across multiple disciplines and geographies.
  • Develop organizational capabilities spanning architecture, RTL, integration, verification, DFT, physical design, and silicon bring-up.
  • Create a culture of technical excellence, accountability, innovation, and execution discipline.
  • Drive talent acquisition, succession planning, and leadership development.
  • Collaborate with Architecture, Verification, DFT, Physical Design, Package Design, Software, Product Engineering, Foundry, and Operations teams.
  • Interface with customers, ecosystem partners, IP providers, EDA vendors, and technology partners.
  • Align technical execution with business objectives, schedules, and product roadmaps.
  • Lead reviews, executive communications, risk assessments, and program status reporting.
  • Define and execute design strategies for advanced semiconductor technologies.
  • Partner with foundries and ecosystem partners on technology enablement, PDK readiness, IP qualification, and silicon learning.
  • Drive adoption of advanced design methodologies, low-power architectures, chiplet integration, 2.5D/3D packaging, and emerging AI-driven design flows.
  • Perform activities safely and responsibly and support Environmental, Health, Safety & Security requirements and programs.
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