Director Advanced IC Package Development

Renesas Electronics•San Jose, CA

9d•Onsite

About The Position

Renesas is seeking a Director of Advanced IC Packaging Development to lead the Next Generation Power Packaging roadmap. This role is pivotal in enabling the AI and Datacenter revolution by developing cutting-edge Smart Power Stages, Vertical Power Stages, and Wide Bandgap (SiC/GaN) solutions. You will oversee the entire lifecycle from R&D and NPI to high-volume global OSAT management, ensuring Renesas remains at the forefront of power density and thermal efficiency.

Requirements

Doctorate, Master’s, or Bachelor’s degree in Physics, Chemistry, Mechanical, Electrical, or Materials Engineering.
15 to 20 years of relevant experience in semiconductor package development, specifically emphasizing power SIP/modules and wafer level & flip-chip packaging.
Deep knowledge of Power SiP/Modules, Flip-Chip, and Wafer Level assembly.
Familiarity with Smart Power Stages and Vertical Power architectures.
Expertise in SPC, statistical analysis software, and qualification methods.
Exceptional interpersonal, presentation, and communication skills; ability to influence stakeholders at the executive level.

Responsibilities

Define and execute the global packaging roadmap, focusing on Power SiP/Modules, Wafer Level Packaging, and Flip-Chip technologies.
Lead R&D initiatives for Wide Bandgap (SiC & GaN) power devices, utilizing advanced substrates like DBC (Direct Bonded Copper) and AMB (Active Metal Brazing).
Manage the annual R&D budget and oversee customer adoption programs to align technical capabilities with market demand.
Establish and maintain corporate package design rules to ensure manufacturability and reliability
Benchmark, select, and qualify global OSATs and Contract Manufacturers (CM) for new package technologies.
Lead the transition of new products from R&D to High Volume Manufacturing (HVM).
Collaborate with Product and Reliability teams to qualify new packages within aggressive timeframes.
Resolve process integration bottlenecks by ensuring exhaustive window checks on critical process steps.
Implement SPC (Statistical Process Control) and production monitors to prevent quality incidents and excursions.
Act as the technical authority for internal and external customer complaints, working with Marketing, Quality, and Operations to provide root-cause analysis and resolutions.
Maintain a competitive edge by staying current on industry innovations in interconnect methods (Wire-bonding, Multi-chip modules, etc.).
Drive DOE (Design of Experiments) with partners to optimize assembly processes and establish rigorous process specifications.
Monitor production early in the ramp phase to resolve integration issues and ensure superior quality.