Digital Design RTL Engineer

BroadcomFort Collins, CA

About The Position

The Digital Design RTL Engineer will operate with a high degree of autonomy, taking designs from initial specification through to timing closure and physical design hand-off. This role involves close collaboration with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule. The ideal candidate will have high proficiency in SystemVerilog and a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below). A deep understanding of PPA optimization, clock domain crossing (CDC) analysis, and low-power design techniques is essential.

Requirements

  • High proficiency in SystemVerilog
  • Proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below)
  • Deep understanding of PPA optimization, clock domain crossing (CDC) analysis, and low-power design techniques
  • BSEE required

Nice To Haves

  • MSEE/PHD preferred
  • 5+ years of industry experience with a focus on SoC integration, LPDDR5/6, DDR4/5 and/or high-speed SerDes, or HBM protocols is highly preferred

Responsibilities

  • Operate with a high degree of autonomy, taking designs from initial specification through to timing closure and physical design hand-off
  • Collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule

Benefits

  • Discretionary annual bonus
  • Competitive new hire equity grant
  • Annual equity awards
  • Medical, dental and vision plans
  • 401(K) participation including company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • Company paid holidays
  • Paid sick leave
  • Vacation time
  • Paid Family Leave
  • Other leaves of absence
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