Digital Design / FPGA Engineering - Intern

Altera • San Jose, CA

1d • $85,000 - $90,000 • Onsite

About The Position

Altera is seeking a highly motivated Electrical Engineering intern to join the FPGA and digital systems engineering team. This role provides hands-on experience with RTL design, FPGA development, and SoC-level integration, contributing to cutting-edge programmable logic solutions. The ideal candidate has a strong foundation in digital system design, SystemVerilog, and hardware verification, with demonstrated experience through academic projects or engineering teams.

Requirements

• Currently pursuing a Bachelor’s Degree in Electrical Engineering or related field
• Coursework in Digital System Design, Computer Architecture, or Advanced Programming

Nice To Haves

• Experience with SystemVerilog (RTL) and digital logic design (combinational & sequential circuits)
• Familiarity with FPGA design and simulation environments
• Familiarity with ASIC design flow and verification methodologies
• Familiarity with finite state machines (FSMs) and module-level design
• Programming experience in C, Python, or MATLAB
• Exposure to SoC design concepts and hardware/software integration
• Experience with tools such as Git, KiCad/Altium, Arduino, or FPGA simulators
• Hands-on experience with hardware prototyping, PCB design, or board-level testing
• Participation in engineering teams such as SoC/Chip Design groups or student semiconductor organizations
• Experience developing testbenches with directed stimulus and edge-case validation
• Teaching or mentoring experience in digital design or RTL concepts

Responsibilities

• Design and implement digital hardware using SystemVerilog RTL, including combinational and sequential logic components such as finite state machines (FSMs)
• Develop and verify hardware modules using custom testbenches and simulation tools, ensuring functional correctness across edge cases
• Contribute to FPGA-based system development, including integration and validation of system-level blocks
• Support design and implementation of dataflow architectures and arithmetic modules (e.g., matrix multipliers)
• Participate in the ASIC/SoC design flow, including RTL development, verification, and system integration
• Collaborate with cross-functional engineering teams to debug, test, and improve hardware designs
• Assist in documentation, design reviews, and creation of block diagrams and technical reports

Benefits

• Real-world experience working on industry-grade FPGA and semiconductor designs
• Exposure to the full hardware design lifecycle — from RTL to system integration
• Mentorship from experienced engineers in programmable logic and SoC development
• Opportunity to contribute to impactful projects in a collaborative engineering environment

What This Job Offers

• Career Level: Intern