Design Verification Graduate Intern 2027

Intel•Fort Collins, CO
•$105,698 - $105,702•Onsite

About The Position

This graduate intern role with Intel’s Data Center Group (DCG) contributes to functional verification of silicon designs to ensure they meet specifications and performance targets. The intern supports verification planning, test-bench development, and verification-environment development to provide thorough architecture coverage. The position also involves collaborating with architecture and design teams, assisting with simulation and emulation, analyzing power and performance metrics, and helping identify and debug design issues. The intern will learn industry best practices while working in a collaborative environment and exploring career development opportunities. The role requires an on-site presence. The primary location is Fort Collins, Colorado, with additional location information for Santa Clara, California. It is a student/intern position on Shift 1. The application window is expected to end on January 15, 2027.

Requirements

  • Must be pursuing a master's or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field.
  • Must have 0–1 years of hands-on design verification experience gained through internships, academic projects, coursework, or similar experience.
  • Understanding of logic design, computer architecture, and verification methodologies.
  • Knowledge of industry-standard tools for simulation, emulation, or debugging processes.
  • Proficiency in a hardware description language such as Verilog or VHDL.
  • Experience with scripting languages or programming, such as Python or C/C++.
  • GPA of 3.0 or higher.

Nice To Haves

  • Knowledge of DRAM memory technology.
  • GPA of 3.0 or higher.

Responsibilities

  • Support development of verification plans, test benches, and verification environments to ensure design architecture coverage.
  • Collaborate with architecture and design teams to verify functional correctness, implementation efficiency, and performance optimization.
  • Assist with emulation and simulation tasks to validate designs, analyze power and performance metrics, and uncover bugs.
  • Contribute to root cause analysis and debug efforts for design issues, supporting corrective measures and improvements.
  • Learn and apply industry best practices in functional silicon design verification while exploring career development opportunities in a collaborative team environment.

Benefits

  • Competitive pay
  • Stock bonuses
  • Health benefits
  • Retirement benefits
  • Vacation
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