Career Accelerator Program - Mixed Signal Verification and Digital Design Engineer

Texas Instruments•Tucson, AZ

12h

About The Position

In your first year with TI, you will participate in the Career Accelerator Program (CAP), which provides professional and technical training and resources to accelerate your ramp into TI and set you up for long-term career success. Within this program, we also offer function-specific technical training and on-the-job learning opportunities that will encourage you to solve problems through a variety of hands-on, meaningful experiences from your very first day on the job. We are seeking a highly motivated and versatile engineer to join our dynamic Current Sensing product line that develops cutting edge Shunt and Magnetic mixed signal current sensing ICs. As a key member of our team, you will play a vital role in all phases of IC development, from architectural definition, design, DV, tapeout and bring-up. This position offers a unique opportunity to develop expertise in both digital and mixed-signal domains.

Requirements

Highly motivated and versatile engineer
Ability to solve problems through a variety of hands-on, meaningful experiences
Expertise in both digital and mixed-signal domains
Develop and implement robust, scalable verification methodologies for mixed-signal ICs
Testbench creation and automation using DMS and AMS stimulus and checkers
Create comprehensive test plans, tests, and simulations at RTL and gate levels using SystemVerilog (SV), VHDL, and the UVM environments
Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route, scan pattern generation, and timing analysis
Work closely with design and system teams to define Design for Verification (DFV) architectures
Triage and resolve bugs
Ensure first-pass silicon success
Drive verification coverage to meet defined goals
Track progress, and communicate status, issues, and risks effectively
Develop and contribute to the evolution of our DV strategy, tools, scripts and methodologies to improve quality, efficiency and automation

Responsibilities

Develop and implement robust, scalable verification methodologies for mixed-signal ICs, including testbench creation and automation using DMS and AMS stimulus and checkers.
Create comprehensive test plans, tests, and simulations at RTL and gate levels using SystemVerilog (SV), VHDL, and the UVM environments.
Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route, scan pattern generation, and timing analysis.
Work closely with design and system teams to define Design for Verification (DFV) architectures, triage and resolve bugs, and ensure first-pass silicon success.
Drive verification coverage to meet defined goals, track progress, and communicate status, issues, and risks effectively.
Develop and contribute to the evolution of our DV strategy, tools, scripts and methodologies to improve quality, efficiency and automation.
Gain exposure to other roles such as: Digital Design & Analog Design through formal learning, projects and on-the-job development experiences that will help you broaden your knowledge and accelerate your growth and success at TI.