Design Validation & Test (DVT) Engineer
About The Position
Celero is seeking an experienced Principal Design Validation & Test (DVT) Engineer to lead post-silicon validation for next-generation coherent DSP ASICs powering AI and hyperscale optical networking. The role contributes to first-silicon enablement, silicon characterization, and product readiness for customer deployment and high-volume production. It is a visible technical leadership position in a fast-paced startup, working closely with Architecture, RTL Design, Firmware, Systems, Product Engineering, and customers. The engineer will influence validation strategy, define best practices, and help build validation infrastructure from the ground up. The role is based onsite at Celero's Irvine, California headquarters. The posting also identifies Junior, Senior, and Principal DVT Engineer roles.
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
- At least 8 years of hands-on post-silicon validation, DVT, or silicon bring-up experience with complex ASICs or SoCs.
- Proven experience bringing first silicon to production in networking, communications, data center, AI, or high-performance computing products.
- Strong understanding of silicon debug methodologies and structured root-cause analysis.
- Extensive experience with laboratory equipment, including oscilloscopes, BERTs, protocol analyzers, network analyzers, and logic analyzers.
- Strong knowledge of one or more high-speed protocols, such as PCIe, Ethernet, SerDes, CXL, USB, SPI, or I²C.
- Strong Python programming skills for automation, regression development, and data analysis.
- Experience validating firmware, embedded software, drivers, and hardware/software interfaces.
- Ability to interpret schematics and understand board design, power sequencing, signal integrity, and hardware debug.
- Excellent communication skills and ability to work effectively across Architecture, Design, Firmware, Systems, Product Engineering, Manufacturing, and Customer Engineering teams.
- Comfort working in a fast-paced startup environment where priorities evolve quickly and team members have significant technical ownership.
- Ability to work onsite at the Irvine, California headquarters.
Nice To Haves
- Experience validating coherent optical DSPs, networking ASICs, Ethernet switch silicon, AI accelerators, GPUs, storage controllers, or high-speed communications devices.
- Strong knowledge of Ethernet, PCIe, OIF, IEEE, or related compliance specifications.
- Experience with PIPE, PCS, PMA, MAC, PHY, or other physical and protocol layers of high-speed interfaces.
- Experience building scalable validation automation, regression systems, dashboards, and data pipelines.
- Familiarity with customer platform validation and hyperscale qualification processes.
- Experience mentoring engineers and leading technical initiatives across multiple engineering disciplines.
Responsibilities
- Lead post-silicon validation and characterization of complex ASICs and SoCs from first silicon through production release.
- Develop validation plans covering functionality, performance, interoperability, compliance, stress testing, corner cases, and reliability.
- Enable first-silicon bring-up using JTAG, scan, embedded debug features, and board-level diagnostics.
- Validate high-speed interfaces and industry-standard protocols, including PCIe, Ethernet, SerDes, CXL, SPI, I²C, and MDIO.
- Use advanced laboratory equipment to conduct validation and testing.
- Debug hardware, firmware, RTL, and system-level issues with cross-functional engineering teams, identify root causes, and drive resolution.
- Develop scalable Python-based automation frameworks for test execution, regression, silicon characterization, data analysis, and reporting.
- Validate firmware, bootloaders, device drivers, and hardware/software interfaces across multiple platforms.
- Characterize silicon performance, power, thermal behavior, margins, and compliance against architectural specifications.
- Lead debug reviews and provide technical direction on validation methodology, infrastructure, and best practices.
- Support early customer engagements by reproducing and resolving system-level issues in collaboration with applications engineering.
- Document validation results, silicon characterization data, debug findings, and production-readiness reports.
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
