Design for Test Intern, BS - Summer 2027
Marvell Technology•Westborough, MA
•$30 - $59
About The Position
Marvell is looking for an entry-level Design-for-Test (DFT) intern who will help with the design, and implementation of DFT designs and reference flows. They will coordinate and support their deployment on latest system-on-chip (SOC) designs to ensure successful delivery to end client. This work is critical to support Marvell’s current customer engagements and directly leads to Marvell’s revenue.
Requirements
- Currently enrolled in a Bachelor’s Degree in EE, CE, or a related field with an expected graduation date of Fall 2027 – Summer 2028
- Fluent in English Language – written & verbal.
Nice To Haves
- Basic understanding of Linux/Unix/BSD Internals, with experience working on multi-threaded systems
- Strong programming skills in scripting languages (e.g., TCL, Python) in a Unix type environment, with good problem-solving skills
- Knowledge of SOC (system on a chip) design flow and DFT practices is a plus, e.g., At-Speed Test, Built-in Self-Test (BIST), Automated Test Pattern Generation (ATPG), IEEE1149.6 (AC-JTAG), and IEEE1687 (IJTAG).
Responsibilities
- Understand the design requirements and customer specifications
- Learn and run the defined computer-aided design (CAD) tools/flow for the assigned designs
- Design and develop the SOC using Linux, TCL, Python/Perl (or other equivalent scripting languages)
- Analyze, debug, and implement DFT features using defined CAD tools/flow
- Collaborate with global CAD teams on design flow fixes and feature improvements
- Assist in design verification efforts using ICL/PDL constructs and SV/UVM
Benefits
- medical, dental, and vision coverage
- perks and discounts
- robust mental health resources
- paid holidays
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What This Job Offers
Career Level
Intern
