Design Automation Engineer (TFM/EDA)

Intel Corporation•Santa Clara, CA

2d•$137,610 - $265,870•Hybrid

About The Position

As an Infrastructure and DevOps Engineer at Intel Foundry, you will help enable and optimize design environments supporting advanced semiconductor development. The role focuses on installing, maintaining, and providing technical support for design automation scripts, front-end and back-end tools, workflows, and licenses. You will help integrate new tools and methods into existing workflows to support efficient, scalable design processes. Intel Foundry’s Infrastructure and Solutions team delivers solutions for engineering teams and supports the design of next-generation products. In this role, you will collaborate with EDA providers, PDK and library experts, flow development teams, product design teams, and engineering compute teams. The position is hybrid, allowing employees to split time between an assigned Intel site and off-site work.

Requirements

US citizenship is required.
Ability to obtain a US Government Security Clearance TS/SCI.
Bachelor’s degree in a relevant field and 6 or more years of hands-on infrastructure and DevOps experience; or a master’s degree and 4 or more years of experience; or a PhD and 2 or more years of experience.
Experience with front-end and back-end EDA tools, flows, and methodologies, including debugging and problem-solving.
Knowledge of physical design optimization and tool flows and methodologies (TFM).
Experience with scripting languages such as Tcl, Perl, and Python, and familiarity with Verilog or VHDL.
Expertise in Linux-based environments, including bash and tcsh.

Nice To Haves

Hands-on experience with industry-standard front-end and back-end EDA tool installations.
Experience installing foundry PDKs and flows, including tools such as Cheetah.
Experience with debugging and design automation.

Responsibilities

Resolve tool and methodology issues encountered along the design path to TapeOut.
Provide training and documentation support for design ramp-up activities.
Collaborate with EDA providers to ensure required tool features meet project quality expectations.
Partner with PDK and library experts, flow development teams, and product design teams to drive workflow improvements.
Work with engineering compute teams to provision adequate compute capacity and troubleshoot related issues.
Develop automation for installing and optimizing design environments, including PDKs, EDA tools, and licenses.
Integrate new tools and methods into existing workflows and support scalability and adoption across design teams.