Design Architecture, Member of Technical Staff,HBM

Micron • Richardson, TX

15h

About The Position

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. HBM Design Architecture — Member of Technical Staff (MTS) We design memory architectures that power the next wave of AI systems. Our team works at the intersection of hardware, systems, and real-world workloads to shape how future platforms scale. We thrive on curiosity, rigorous analysis, and turning complex data into clear direction. If you enjoy working on problems that will define what comes next, you’ll feel at home here. This role sits at the heart of how AI memory systems are envisioned and evaluated. You’ll explore emerging trends, model real workloads, and translate signals from across the ecosystem into concrete architectural decisions. Your work will directly influence HBM direction, system tradeoffs, and long‑term roadmaps while partnering closely with architects and senior engineers across the organization.

Requirements

• Bachelor’s degree or equivalent practical experience in Electrical Engineering, Computer Engineering, Computer Science, or related field
• Experience with computer architecture and hardware/software performance analysis
• Hands‑on experience with memory subsystems such as HBM, DDR, or cache hierarchies
• Proficiency in Python, C/C++, or similar languages for modeling and analysis workflows
• Ability to distill complex analyses into clear, actionable technical outcomes

Nice To Haves

• Master’s degree or higher in a relevant technical field
• Experience analyzing AI or ML training and inference workloads
• Familiarity with large‑scale system bottlenecks across compute, interconnect, storage, and memory
• Experience translating research and modeling results into architectural recommendations
• Comfort influencing technical direction across multiple engineering fields

Responsibilities

• Analyze emerging compute, networking, and storage trends to anticipate future AI system needs
• Define HBM bandwidth and latency targets based on workload and system‑level analysis
• Build and apply performance and simulation models to evaluate memory and system tradeoffs
• Develop dashboards and summaries that communicate insights, assumptions, and sensitivities
• Partner with multi-functional teams to identify architectural opportunities and influence roadmaps

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees