Experienced Defect Product Module Engineer

Samsung•Taylor, TX

9d•Onsite

About The Position

Samsung Austin Semiconductor is seeking a highly technical Defect Engineer to join their fabrication facility in Taylor, Texas. This role focuses on the strategic quantification of yield-impacting defects and the long-term reduction of the factory’s baseline defect trends. The engineer will serve as the Subject Matter Expert (SME) for a specific module, connecting raw inline defect data to final wafer yield. Utilizing advanced data analysis and defect characterization, the role involves working with predictive models to forecast yield loss and drive the technical roadmap for achieving aggressive factory yield targets. This is an impactful role for an engineer passionate about data analysis and using insights from big data to improve physical processes.

Requirements

Bachelor’s Degree in Materials Science, Electrical Engineering, Chemical Engineering, Mechanical Engineering or a related STEM field.
Broad semiconductor knowledge including different types of materials used during the manufacturing process, process tool theory of operations/or hands on experience, and general semiconductor process knowledge.
Expert proficiency in JMP, Spotfire, or, Python is highly preferred for statistical modeling and data mining.
Strong understanding of Design of Experiments (DOE) and ANOVA to validate yield improvement actions.
Familiar with Metrology tool models and capabilities for defect inspection and when different strategies are used for specific types of defects.

Responsibilities

Quantify the impact of specific defect types on final yield and drive systematic actions to reduce the baseline defect density across the manufacturing flow.
Improve predictive models that correlate random inline defects to final yield loss, providing early warning signals of yield degradation.
Perform deep-dive characterization of defects (using SEM, TEM, or EDX) to link physical defect signatures to specific process failures within the assigned module.
Serve as the primary SME for the assigned module, providing technical guidance to process and equipment engineers on tools and processes for yield improvement.
Define and drive the strategy for yield improvement, executing to quarterly and annual targets and tracking progress against factory-level yield goals.
Utilize large datasets to perform spatial analysis (wafer maps) and temporal analysis to identify causes for yield variation.
Partner with Process Integration and Failure Analysis engineers to determine the "killer" vs. "non-killer" status of defects to ensure engineering efforts are focused on the highest-ROI improvements.