Deep Learning Hardware Engineer

Intel Corporation•Santa Clara, CA

1d•$149,750 - $240,710•Hybrid

About The Position

Intel's Client AI Architecture team is seeking a Deep Learning Hardware Engineer to help shape future generations of Intel's Neural Processing Unit (NPU) architecture for AI PCs, Edge AI, Agentic AI, Physical AI, and multimodal foundation models. The role works at the intersection of AI, computer architecture, and hardware-software co-design to optimize AI workloads and drive innovations in next-generation AI acceleration technologies. The engineer will collaborate with architecture, software, compiler, and machine learning teams to develop high-performance, power-efficient AI solutions for Intel client platforms. The position is within Intel's AI Hardware Engineering organization and the Client Computing Group, which develops technologies for personal computing experiences. It provides opportunities to work on AI and machine learning technologies, learn from hardware and AI experts, influence future AI silicon architecture, and collaborate across hardware, software, and research teams. The role is hybrid, allowing time between an assigned Intel site and off-site work.

Requirements

Bachelor's degree in Computer Science, Electrical Engineering, or a STEM-related field and 3+ years of relevant experience; or a master's degree in the same fields and 2+ years of experience; or a PhD degree in the same fields and 3+ months of educational or work experience.
Experience in digital logic design and RTL design using System Verilog or Verilog.
Experience with AI model architectures, layers, activation functions, and neural network topologies (for example, Llama, Qwen, DeepSeek, or Pi0.5).
Experience working with Git workflows and repositories.
Experience optimizing AI models for performance, such as through quantization, pruning, and compression.

Nice To Haves

Familiarity with AI frameworks, neural computing operations, and hardware-accelerated inference techniques.
Hands-on experience with modern deep learning topologies, including foundational models.
In-depth knowledge of computer architecture concepts such as multi-core/multi-threading, memory hierarchy, and floating-point versus fixed-point computations.
Experience collaborating in cross-disciplinary teams to align hardware and software requirements.
Experience developing, optimizing, or deploying AI workloads on NPUs, GPUs, AI accelerators, or related computing architectures; experience with Intel NPUs, OpenVINO, AI software stacks, compiler technologies, AI inference optimization, and hardware-software co-design is highly desirable.

Responsibilities

Contribute to the design and optimization of neural compute and AI accelerator architectures.
Develop and evaluate RTL implementations of hardware features supporting machine learning workloads.
Analyze AI models and workloads to identify performance, power, and efficiency opportunities.
Partner with architecture, software, and algorithm teams to define future hardware capabilities.
Support hardware-software co-design efforts to optimize AI solutions across the technology stack.
Evaluate neural network mapping strategies for accelerated inference execution.
Apply quantization, compression, pruning, and sparsity techniques to improve AI efficiency.
Use computer architecture principles, including pipelining, parallelism, memory hierarchy, and data movement optimization.
Participate in technical innovation activities, including invention disclosures, patents, conference papers, and publications.