Datacenter & Agentic AI Workload Performance Analysis Engineer

Tenstorrent•Santa Clara, CA

6d•$100,000 - $500,000•Remote

About The Position

Tenstorrent is looking for a Workload Performance Analysis Engineer to help shape the performance of our next-generation RISC-V CPUs across modern datacenter and agentic AI workloads. In this role, you’ll sit at the intersection of hardware and software, bringing real-world applications onto RISC-V platforms, characterizing their behavior, and using workload analysis to uncover opportunities for better CPU performance, efficiency, and scalability. You’ll work closely with CPU architects, RTL designers, software engineers, and compiler teams to understand how demanding workloads exercise the CPU and translate those insights into architectural improvements. From reducing large production workloads for performance modeling to correlating simulation results with hardware behavior, your work will directly influence CPU architecture and performance across cloud, enterprise, and emerging AI workloads.

Requirements

Strong background in CPU performance analysis, workload characterization, or computer architecture, with experience connecting software behavior to hardware performance
Understanding of modern CPU microarchitecture, including superscalar pipelines, speculative execution, memory hierarchies, and vector/SIMD architectures
Experience digging into complex workloads, using profiling and simulation data to identify bottlenecks and turn analysis into actionable recommendations
Comfortable working across hardware and software, from CPU microarchitecture and RTL to operating systems, compilers, runtimes, and applications
Strong technical communication skills and enjoyment of collaborating with architects, designers, and software engineers on complex performance problems
PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related field, with strong research or industry experience in workload characterization, benchmark development, performance analysis, or simulation
Deep understanding of CPU architecture and RISC-V, including pipelines, speculative execution, vector/SIMD extensions, memory hierarchies, and performance tradeoffs
Hands-on experience with performance analysis and simulation tools such as Linux perf, strace, QEMU, or CPU microarchitecture simulators
Strong programming skills in C/C++, Python, Bash/Shell, and assembly or intrinsic programming, with experience working close to the hardware/software boundary
Strong understanding of systems software, including operating systems, virtualization, compilers, runtimes, and GNU/RISC-V software ecosystems

Responsibilities

Bring real-world applications onto RISC-V platforms
Characterize the behavior of applications on RISC-V platforms
Use workload analysis to uncover opportunities for better CPU performance, efficiency, and scalability
Work closely with CPU architects, RTL designers, software engineers, and compiler teams to understand how demanding workloads exercise the CPU
Translate workload insights into architectural improvements
Reduce large production workloads for performance modeling
Correlate simulation results with hardware behavior