CST Application Engineer Intern - Silicon

Cadence Systems•San Jose, CA

9d•Onsite

About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This is an exciting summer 2027 internship opportunity with a leading Silicon Valley technology company. Join the Cadence Design Systems Customer Success Team (CST), where you will work with industry-leading electronic design automation (EDA) tools and collaborate with technical experts in a dynamic, innovative environment focused on silicon design, systems development, and design automation. You will gain insight into leading-edge silicon and systems technologies, learn how a global technology company operates, and experience how technical teams solve complex engineering challenges. Cadence is a global leader in electronic design, building on more than 35 years of computational software expertise. Through its Intelligent System Design strategy, Cadence delivers software, hardware, and intellectual property that transform silicon and electronic design concepts into reality. Cadence serves many of the world’s most innovative companies, enabling extraordinary electronic products—from chips and boards to complete systems—for dynamic markets including consumer electronics, hyperscale computing, 5G communications, automotive, aerospace, industrial, and healthcare. At Cadence, we hire and develop leaders and innovators who are committed to advancing technology and making a meaningful global impact.

Requirements

Currently enrolled in a STEM, electrical engineering, or computer engineering program.
Must be a rising senior pursuing a bachelor’s degree in electrical engineering, computer engineering, or another STEM discipline at an accredited university.
Must be able to manage multiple complex assignments.
Demonstrate strong communication, presentation, assessment, and analytical skills.

Nice To Haves

Experience with electronic design automation (EDA).
Foundational silicon, package or board design experience.
AI use cases experience.

Responsibilities

Participate in a three-month, cohort-based program alongside peers from across the United States.
Gain hands-on training in applications supporting system and package design; digital and analog IC design and simulation; physical design and analog layout; advanced verification; hardware emulation; and the application of artificial intelligence across these disciplines.
Learn from technical experts and application engineers who provide design services, technical sales support, and customer support to Cadence’s most advanced customers.
Gain experience in the fundamentals of design, verification, synthesis, and timing analysis.
Gain experience in embedded software development and hardware/software co-design and co-verification.
Gain experience with UNIX, C/C++, and scripting languages such as Perl, Tcl, and Python.
Gain experience in digital physical design and implementation for silicon and systems.
Gain experience in analog physical design and implementation for silicon.
Gain experience in signoff analysis for timing, IR drop, power, and signal integrity.
Gain experience in the application of artificial intelligence to enhance design flows and methodologies.