CryoCMOS Design Director, Quantum

GlobalFoundries•Austin, TX

10d

About The Position

GlobalFoundries is hiring a CryoCMOS design leader to build and lead its CryoCMOS IC design capability and deliver differentiated integrated-circuit solutions for quantum and other advanced applications. The role leads a multidisciplinary team of approximately 10–20 analog, RF, digital, mixed-signal, and physical design engineers, providing technical direction, organizational leadership, and execution ownership across the IC development lifecycle. The position oversees development from system and circuit architecture through design, simulation, physical implementation, verification, tapeout, silicon bring-up, characterization, and design-to-silicon correlation. It works closely with technology development, PDK, compact modeling, test, packaging, design enablement, customers, and ecosystem partners to turn process capabilities and system requirements into robust, manufacturable ICs, reusable IP, methodologies, and development programs. The role also establishes design processes, review mechanisms, quality standards, and execution metrics, and develops the engineering organization through recruiting, coaching, performance management, and succession planning.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Microelectronics, Applied Physics, or a related technical field.
At least 10 years of relevant semiconductor IC design experience, including progressively increasing technical leadership responsibilities.
Demonstrated experience successfully leading and managing IC design teams; multidisciplinary team experience is preferred.
Experience leading complex IC development through architecture, design, verification, physical implementation, tapeout, silicon bring-up, characterization, and design-to-silicon correlation.
Strong understanding of CMOS IC design, semiconductor devices, design methodologies, physical implementation, verification, PVT variation, parasitic effects, and silicon characterization.
Ability to manage multiple complex IC development activities, prioritize engineering resources, mitigate technical and program risks, and deliver to schedule.
Ability to recruit, develop, coach, and retain high-performing engineering teams and technical leaders.
Ability to communicate complex technical topics, priorities, risks, and recommendations effectively across engineering teams, customers, management, and senior leadership.
Written and verbal fluency in English.
Willingness to travel up to 10%.
The role may require applying for a U.S. Department of Defense Security Clearance if requested.

Nice To Haves

Master's degree or PhD in Electrical Engineering, Microelectronics, Computer Engineering, Applied Physics, or a related field.
Experience leading IC design organizations of 10 or more engineers, including multidisciplinary analog, RF, mixed-signal, digital, and/or physical design teams.
Experience with cryoCMOS, quantum-control or readout electronics, low-temperature electronics, or other advanced semiconductor applications.
Deep expertise in at least one IC design discipline, such as analog/mixed-signal, RFIC, digital IC, or high-speed circuit design, alongside sufficient breadth to lead multidisciplinary development.
Experience working with semiconductor technology development, PDK, compact modeling, EDA, test, packaging, and silicon characterization teams.
Experience establishing or scaling an IC design capability, including methodologies, reusable IP, design flows, technical reviews, and tapeout practices.
Experience engaging customers and ecosystem partners to translate system requirements into semiconductor technology and IC design solutions.
Project management skills, including innovating and executing on important solutions and navigating ambiguity.
Strong written and verbal communication skills.
Strong planning and organizational skills.

Responsibilities

Lead a multidisciplinary CryoCMOS IC design team of approximately 10–20 engineers, setting technical direction, priorities, resource plans, and execution strategy.
Drive end-to-end development of CryoCMOS ICs and reusable design IP, from architecture and design through simulation, physical implementation, verification, tapeout, silicon bring-up, and characterization.
Provide technical leadership through architecture and design reviews, methodology development, performance optimization, design closure, and identification and resolution of technical risks and critical design issues.
Develop differentiated IC solutions, reusable IP, design methodologies, and enablement capabilities for cryogenic, quantum, and other advanced applications.
Partner with PDK, compact modeling, technology development, test, packaging, and design enablement teams to create robust, manufacturable IC solutions and identify design or modeling gaps.
Establish and improve design processes, technical review mechanisms, quality standards, and execution metrics to support predictable delivery and successful tapeouts.
Recruit, coach, mentor, and retain engineers; manage performance, succession planning, and development of future technical leaders.
Collaborate with internal stakeholders, customers, and ecosystem partners to translate system requirements and technology opportunities into roadmaps, IC architectures, and executable development programs.
Perform activities safely and responsibly and support Environmental, Health, Safety & Security requirements and programs.
Collaborate on other projects or assignments as needed.