CPU STA CAD Engineer

QualcommAustin, TX
$198,700 - $298,100

About The Position

NUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. As CPU STA CAD engineer, you will build and support the world’s best analysis tools and flows. Your tools and flows will ensure our custom CPUs have industry-leading power, performance and area.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
  • PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.

Nice To Haves

  • Industry experience of Static Timing Analysis (STA) on cutting edge technology nodes
  • Programming/Scripting skills (Python and Tcl in particular) and an automation mindset.
  • Coding with a focus on quality and reusability. Leverage static checking, Test Driven Development, CI/CD, etc to achieve high quality software
  • Experienced in generating/optimizing/automating timing ECO closure
  • Detailed understanding of STA concepts (e.g.: LVF/CCS/SSI/NBTI) and how they impact margins/derates
  • Debugging/Support with project deadlines in mind
  • Synthesis/PnR experience with a focus on PPA optimization.
  • Collaborate with EDA partners to determine/drive optimal and cutting-edge solutions
  • Web/Database/Dashboards/Visualization experience a plus.
  • Experience applying AI techniques to EDA workflows, including log analysis, root-cause investigation, metrics mining, knowledge retrieval, and automated generation of scripts, documentation, and test collateral.

Responsibilities

  • Architect and recommend methodology improvements to ensure our silicon has the best power, performance and area
  • Maintain, support and debug STA and timing closure (ECO) flows, and resolve project-specific issues
  • Work closely with worldwide CPU physical design teams, and provide methodology guidance and tools/flows support.
  • Work with EDA vendors to define roadmap and to resolve tool issues.

Benefits

  • competitive annual discretionary bonus program
  • opportunity for annual RSU grants
  • highly competitive benefits package is designed to support your success at work, at home, and at play.
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