CPU Physical Design Engineer

Intel • Austin, TX

14h • Hybrid

About The Position

The Role and Impact: As a CPU Physical Design Engineer, you will be a vital member of Intel's E-Core/Atom microprocessor design team, shaping the future of high-performance CPUs. This role offers the opportunity to work on cutting-edge technology, solving complex design challenges, and optimizing CPU designs to deliver industry-leading performance-per-watt solutions. Your work will directly contribute to driving innovation, enabling advanced computing platforms, and supporting Intel's mission to enrich the lives of every person on earth. Key Responsibilities: Perform physical design implementation of custom CPU designs from RTL to GDS, creating design databases ready for manufacturing. Conduct verification and signoff processes, including formal equivalence verification, static timing analysis, reliability verification, and physical verification tasks like DRC/LVS, noise analysis, and electro migration checks. Execute all aspects of the CPU physical design flow, including synthesis, floor planning, place and route, clock tree synthesis, static timing analysis, power distribution, reliability, and noise analysis. Optimize CPU designs to enhance product-level parameters such as power efficiency, frequency, and area. Collaborate closely with cross-functional teams, including logic, circuit, architecture, and design automation teams, to improve current and future CPU microarchitectures. Work alongside industry EDA vendors to enhance tool capabilities and methodologies for designing high-speed, low-power CPUs. Participate in the development and improvement of physical design methodologies and flow automation processes. Develop scripts to automate design implementation stages, verification tasks, and quality analysis. Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: -Bachelor's degree in Computer Engineering or Electrical Engineering similar discipline with 4+ years of relevant experience, or Master's degree in Computer Engineering or Electrical Engineering or similar discipline with 3+ years of relevant experience, or PhD in Computer Engineering or Electrical Engineering or similar discipline with no prior work experience. 3+ years' experience in physical design tools such as Synopsys Fusion Compiler, Cadence Genus/Innovus, or similar industry-standard tools for synthesis and place-and-route. 2+ years' experience with formal equivalence verification tools and methods. 4+ years' hands-on experience with scripting languages such as TCL, Perl, or Python, and source code management. 2+ years' experience with static timing analysis methodologies and tools, including PrimeTime or equivalent, for timing closure and signoff. Preferred Qualifications: Demonstrated expertise in chip-level physical design verification, including formal equivalence verification, electrical rule checking, and timing closure for worst-case corners. Experience with multiple-power plane design methodologies (MPP/UPF) and transistor-level custom designs. Familiarity with machine learning techniques for design optimization and problem solving and expertise in leveraging co-pilot (VScode) for design analysis, debug, and software development. Effective communication skills and a collaborative mindset to work across diverse teams and geographies. A continuous learning attitude and strong analytical capabilities to tackle complex design challenges. Knowledge of physical verification processes such as DRC/LVS, noise analysis, and reliability verification using tools like Caliber, Redhawk, or equivalent. Join us in crafting world-changing technology and driving innovation that shapes the future of computing. Apply today and become a part of Intel's mission to build a better tomorrow. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Requirements

• Bachelor's degree in Computer Engineering or Electrical Engineering similar discipline with 4+ years of relevant experience, or Master's degree in Computer Engineering or Electrical Engineering or similar discipline with 3+ years of relevant experience, or PhD in Computer Engineering or Electrical Engineering or similar discipline with no prior work experience.
• 3+ years' experience in physical design tools such as Synopsys Fusion Compiler, Cadence Genus/Innovus, or similar industry-standard tools for synthesis and place-and-route.
• 2+ years' experience with formal equivalence verification tools and methods.
• 4+ years' hands-on experience with scripting languages such as TCL, Perl, or Python, and source code management.
• 2+ years' experience with static timing analysis methodologies and tools, including PrimeTime or equivalent, for timing closure and signoff.

Nice To Haves

• Demonstrated expertise in chip-level physical design verification, including formal equivalence verification, electrical rule checking, and timing closure for worst-case corners.
• Experience with multiple-power plane design methodologies (MPP/UPF) and transistor-level custom designs.
• Familiarity with machine learning techniques for design optimization and problem solving and expertise in leveraging co-pilot (VScode) for design analysis, debug, and software development.
• Effective communication skills and a collaborative mindset to work across diverse teams and geographies.
• A continuous learning attitude and strong analytical capabilities to tackle complex design challenges.
• Knowledge of physical verification processes such as DRC/LVS, noise analysis, and reliability verification using tools like Caliber, Redhawk, or equivalent.

Responsibilities

• Perform physical design implementation of custom CPU designs from RTL to GDS, creating design databases ready for manufacturing.
• Conduct verification and signoff processes, including formal equivalence verification, static timing analysis, reliability verification, and physical verification tasks like DRC/LVS, noise analysis, and electro migration checks.
• Execute all aspects of the CPU physical design flow, including synthesis, floor planning, place and route, clock tree synthesis, static timing analysis, power distribution, reliability, and noise analysis.
• Optimize CPU designs to enhance product-level parameters such as power efficiency, frequency, and area.
• Collaborate closely with cross-functional teams, including logic, circuit, architecture, and design automation teams, to improve current and future CPU microarchitectures.
• Work alongside industry EDA vendors to enhance tool capabilities and methodologies for designing high-speed, low-power CPUs.
• Participate in the development and improvement of physical design methodologies and flow automation processes.
• Develop scripts to automate design implementation stages, verification tasks, and quality analysis.

Benefits

• Our total rewards package goes above and beyond just a paycheck.
• Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals.
• Go to Intel Benefits | Intel Careers for details of benefits available to you.
• Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.
• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
• Find out more about the benefits of working at Intel .

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees