Compiler Engineer for Tile-based AI DSLs

Intel Corporation•Austin, TX

9d•$149,600 - $284,580•Hybrid

About The Position

As a Compiler Engineer, you will enhance and maintain compiler software tools optimized for Intel processors. The role focuses on developing features, optimizing performance, and resolving defects to ensure high-quality, efficient compiler-generated code. You will help developers maximize the performance of Intel CPU and GPU platforms. The position is part of Intel's Data Center Group (DCG), within the Compiler Technology Innovation team. The team develops compiler tools for Intel processors and works on high-performance computing, artificial intelligence, and heterogeneous computing. It collaborates across engineering teams and contributes to open-source communities. This role is eligible for Intel's hybrid work model, with time split between an assigned Intel site and off-site work. Primary location is Santa Clara, California; additional locations are Folsom, California; Beaver Brook, Massachusetts; Hillsboro, Oregon; and Austin, Texas. The position is not eligible for Intel immigration sponsorship.

Requirements

Bachelor's degree in Computer Science, Applied Mathematics, Informatics, or a related technical field, plus 4 or more years of experience; or a master's degree in one of these fields plus 3 or more years of experience; or a PhD in one of these fields plus 1 or more years of experience.
Experience with C/C++, SYCL, CUDA, DSLs, object-oriented programming, and development of production-quality compilers or similar software tools.
Expertise in compiler architecture and software optimizations for CPU/GPU performance.
Experience troubleshooting and resolving technical issues, with debugging skills.
Ability to work independently and effectively in a collaborative environment.
Strong ownership mindset and a proactive approach to resolving challenges.

Nice To Haves

Experience with parallel programming models such as OpenMP and with vectorization techniques.
Hands-on experience with LLVM, MLIR, or the TileIR compiler framework, including compiler optimizations and code generation for efficient CPU performance.
Knowledge of performance analysis tools such as perf and of modern CPU/GPU architecture.
Familiarity with language runtimes, memory models, and scheduling optimization across heterogeneous architectures.
Cross-industry collaboration on language standards and specifications.

Responsibilities

Develop new features and resolve software defects in Intel compilers targeting CPU and GPU architectures.
Optimize compiler code generation to improve performance across diverse applications and benchmarks.
Conduct functional, performance, and stress testing of compiler tools to ensure quality and reliability.
Collaborate across geographies with engineering, validation, and performance teams to improve product quality and usability.
Contribute to open-source initiatives, including LLVM.