Communications Systems Engineer

Johns Hopkins Applied Physics Laboratory•Laurel, MD

About The Position

The Networked Systems and Integrated Fires group at the Johns Hopkins University Applied Physics Laboratory (APL) seeks a Communications Systems Engineer to contribute to communications system design and implementation, hardware testing and evaluation, firmware, real-time embedded software, and related work. The role supports both new and legacy communications systems across a variety of projects in a fast-paced team environment. The engineer works with multidisciplinary teams to design, implement, and analyze systems and algorithms for resilient, secure, adaptive communications networks operating in highly contested environments. The role includes developing FPGA firmware in VHDL from concept through implementation, evaluation, and deployment; contributing to MATLAB modeling and simulation; validating and analyzing prototype and tactical-system performance against complex operational scenarios; and designing novel solutions for communications concepts constrained by size, weight, power, and cost. The engineer also reports status, analysis results, and algorithms to internal APL staff, program contractors, and government sponsors, and supports occasional field tests for hardware testing. APL describes a welcoming, collaborative culture that encourages creativity and professional growth. Its campus is in the Baltimore-Washington metro area. Applications are accepted on a rolling basis.

Requirements

  • Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related discipline.
  • At least 3 years of experience in FPGA or firmware development using VHDL or Verilog.
  • Demonstrated ability to work independently and as part of a multidisciplinary team.
  • Ability to communicate ideas and results effectively.
  • Professional experience in at least one of the following: implementing digital signal processing algorithms on FPGA; C/C++ embedded programming on FPGA System-on-Chip devices; RF systems link analysis or communications algorithm modeling/simulation in Python or MATLAB; or knowledge of RF hardware design and test principles with hands-on test-equipment experience.
  • Ability to obtain an Interim Secret security clearance by the start date and ultimately obtain a Secret security clearance. U.S. citizenship is required for eligibility for access to classified information.

Nice To Haves

  • Master's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related discipline.
  • Experience implementing advanced FPGA concepts such as adaptive filtering techniques or error correction codes.
  • Hands-on experience implementing high-speed ADC/DAC interfaces on FPGA.
  • Experience with current military links such as CDL or Link 16/MIDS.
  • Active Top Secret security clearance.

Responsibilities

  • Work with multidisciplinary teams to design, implement, and analyze systems and algorithms for resilient, secure, and adaptive communications networks operating in highly contested environments.
  • Develop FPGA firmware in VHDL from concept through implementation, evaluation, and deployment.
  • Contribute to MATLAB modeling and simulation.
  • Validate and analyze prototype and tactical-system performance against complex operational scenarios.
  • Work with a team to design novel solutions and approaches for size-, weight-, power-, and cost-constrained communications concepts.
  • Provide status updates, analysis results, and algorithms in written reports and presentations to internal APL staff, program contractors, and government sponsors.
  • Support occasional field tests for hardware testing.

Benefits

  • Robust education assistance program.
  • Retirement contributions and retirement plans.
  • Paid time off.
  • Medical, dental, vision, and life insurance.
  • Short-term and long-term disability insurance.
  • Flexible spending accounts.
  • Training and development.
  • Potential sign-on bonus, relocation benefits, locality allowance, or discretionary payments for exceptional performance, subject to eligibility and policy.
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