Associate ASIC and/or FPGA Design and Verification Engineer

Boeing•El Segundo, CA

5d•$98,600 - $133,400•Onsite

About The Position

Boeing Space, Intelligence & Weapons Systems is seeking multiple Associate ASIC and/or FPGA Design and Verification Engineers to join the Boeing Electronic Products team. This role is based in El Segundo or Huntington Beach, CA, with a potential for Fairfax, VA. The team develops ASICs and FPGAs for various Boeing products, including constellation satellite programs and computing equipment for commercial airplanes. They work with leading-edge technology to develop complex SoCs and custom processors, applying the latest digital IC design processes and tools. The diverse portfolio offers exposure to different Boeing business units. The engineers will develop state-of-the-art digital ICs/SoCs for critical programs, supporting both new and existing projects. Collaboration with other electronics groups globally is expected. The role supports ASIC/FPGA design and verification for electronics built at El Segundo or other Boeing sites.

Requirements

Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement
Experience with ASIC/FPGA design or verification
Experience with ASIC/FPGA architectural definition, and detailed design implementation and functional verification using SystemVerilog with delivery/release of production designs
Experience with hardware-based integration and test of ASIC/FPGA designs
Ability to obtain a US Security Clearance for which the US Government requires US Citizenship.
An interim and/or final U.S. Secret Clearance Post-Start is required.

Nice To Haves

Master's Degree in EE, Computer Engineering/Science, or related field, or equivalent experience
Experience with hardware emulators, especially Palladium
Proficiency with hardware verification languages: System Verilog, System Verilog Assertions
Ability to executable test plans
Proficiency with Object Oriented Programming Concepts: Inheritance, Polymorphism, etc.
Ability to create self-checking and reusable testbenches from scratch
Experience developing Functional Coverage Models and Closing Code Coverage
Experience with high-speed Serdes interfaces (JESD204C, PCIe, Ethernet)
Proficient in scripting languages: Make, Perl, Python, etc.
Revision Control Systems: svn, cvs, git
Proficient in Linux Environments
Familiarity with space-based design techniques and radiation mitigation
Demonstrated history of 1st pass success with ASIC designs

Responsibilities

Develop FPGA/ASIC designs supporting design and/or verification teams
Implement FPGA/ASIC with latest design practices and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs)
Integrate DSP IP from Boeing’s algorithm team and third-party IP as needed
Perform static timing analysis, LEC, CDC, linting, and other necessary checks to ensure the design is completed on schedule
Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation
Create self-checking and reusable test benches from scratch, applying Object Oriented Programming concepts such as Inheritance and Polymorphism, and leverage UVM to build agents consisting of drivers, sequencers, monitors, and use of predictors together with scoreboards for checking correctness.
Support FPGA-based prototyping and validation depending on program and system requirements and complexity
Validate design through hardware integration test with special test equipment, test-beds, and higher-level systems as needed