ASIC/FPGA Verification Engineer - (Associate, Experienced, or Lead) - SoCal

Boeing•El Segundo, CA

7d•$85,850 - $171,350•Onsite

About The Position

Boeing Space, Intelligence & Weapons Systems is seeking multiple ASIC/FPGA Verification Engineers (Associate, Experienced, or Lead) to join the Boeing Electronic Products team in El Segundo or Huntington Beach, CA. This team develops ASICs and FPGAs that are central to Boeing's products, ranging from complex digitally beamformed phased arrays for satellite programs to computing and networking equipment for commercial airplanes. The group utilizes leading-edge technology to develop complex SoCs, including custom processors using ARM IP for flight computers, and applies advanced digital IC design processes. The diverse development portfolio offers exposure to various Boeing product lines, with approximately half of the work in the Space & Launch business unit and the other half from other sectors like AvionX, Missiles & Weapons, Strike, Surveillance and Mobility, and Autonomous Systems. As an ASIC/FPGA Verification Engineer, you will develop state-of-the-art digital ICs/SoCs for critical enterprise programs, collaborating with other electronics groups globally and supporting design and verification for electronics built in El Segundo and at other sites.

Requirements

A Bachelor of Science degree in Engineering (specializing in Electrical, Mechanical, or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry, or equivalent non-US qualifications relevant to the job description
Proven experience in ASIC/FPGA verification processes
Familiarity with defining the architectural framework for ASIC/FPGA verification using SystemVerilog/UVM, including the delivery and release of production designs
Proficiency in hardware verification languages, particularly SystemVerilog and SystemVerilog Assertions
Demonstrated experience in implementing test plans effectively
Solid understanding of Object-Oriented Programming principles, such as Inheritance and Polymorphism
Capability to design self-checking and reusable testbenches from the ground up
Experience in developing Functional Coverage Models and achieving Code Coverage closure
Capable of collaborating with design and system engineering to establish accurate and verifiable ASIC/FPGA level specifications
Familiarity with waveform debug tools
Revision Control Systems: svn, cvs, git
Proficient in Linux Environments
Must meet U.S. export control compliance requirements. A “U.S. Person” as defined by 22 C.F.R. §120.62 is required. “U.S. Person” includes U.S. Citizen, U.S. National, lawful permanent resident, refugee, or asylee.
Ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim and/or final U.S. Secret Clearance Post-Start is required.

Nice To Haves

Experienced, Level 3: 5+ years of related work experience or an equivalent combination of education and experience
Lead, Level 4: 10+ years of related work experience or an equivalent combination of education and experience
Master's Degree in EE, Computer Engineering/Science, or related field, or equivalent experience
Experience with hardware-based integration and test of ASIC/FPGA designs
Experience with hardware emulators, especially Palladium
Experience with high-speed Serdes interfaces (JESD204C, PCIe, Ethernet)
Proficient in scripting languages: Make, Perl, Python, etc.
Familiarity with space-based design techniques and radiation mitigation
Demonstrated history of 1st pass success with ASIC designs

Responsibilities

Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog.
Develop self-checking and reusable test benches from the ground up, employing Object-Oriented Programming principles such as Inheritance and Polymorphism, while utilizing UVM to build drivers, monitors, predictors, and scoreboards.
Create Functional Coverage Models and conduct Code Coverage analysis to ensure thorough verification of designs during simulation.
Set up regression tests and collect coverage metrics to ensure comprehensive verification and track progress over time.
Assist in FPGA-based prototyping and validation based on program and system requirements and complexity.
Collaborate with cross-functional teams to ensure that verification strategies align with overall project goals and timelines.