ASIC Engineer

Cisco•San Jose, CA

5d•$155,000 - $256,000

About The Position

The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms powering Cisco’s core Switching, Routing, and Wireless products. We design networking hardware for enterprises, service providers, the public sector, and nonprofit organizations worldwide. As part of the team behind Cisco Silicon One—the industry’s only unified silicon architecture spanning top-of-rack switches to web-scale data centers—you’ll help shape Cisco’s groundbreaking solutions by designing, developing, and testing some of the most advanced ASICs in the industry.

Requirements

Bachelor’s Degree in Electrical Engineering with 6+ years of Physical Design experience or Master’s Degree in Electrical Engineering with 4+ years of Physical Design experience, or PhD in Electrical Engineering with 2+ years of Physical Design experience.
Experience with RTL2GDSII flow and design tapeouts in 7nnm/5nm/3nm or below process technologies.
Experience working with EDA tools like Innovus, Tempus/Primetime, Redhawk/Voltus or Calibre.

Nice To Haves

Experience with hierarchical design, timing closure, physical convergence, and power integrity analysis.
Experience with static timing analysis and concepts, defining timing constraints and exceptions, corners/voltage definitions.
Experience with Python, TCL, or Perl programming.

Responsibilities

RTL-to-GDSII implementation, including hierarchical floorplanning, place and route, static timing analysis, power integrity, and equivalence checks with a focus on performance and die size optimization.
Analyze existing tool flows and methodologies, identifying efficiency gaps and implementing incremental or transformative enhancements.
Work closely with RTL, DFT, implementation, EDA vendors, and tool/flow teams to enable best-in-class design methodology.
Guide clock tree synthesis (CTS) strategies and provide actionable feedback to the implementation teams.
Execute STA setup, convergence methodologies, and sign-off processes across multi-mode, multi-corner scenarios.
Complete Timing ECO implementation using Tweaker/Primetime-based flows and contribute to automation for STA methodology.
Evaluate multiple timing methodologies/tools across different technologies and design types.

Benefits

medical, dental and vision insurance
a 401(k) plan with a Cisco matching contribution
paid parental leave
short and long-term disability coverage
basic life insurance
10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees (non-exempt)
flexible vacation time off program (exempt)
80 hours of sick time off provided on hire date and each January 1st thereafter
up to 80 hours of unused sick time carried forward from one calendar year to the next
Optional 10 paid days per full calendar year to volunteer