ASIC Emulation Engineer

Advanced Micro Devices, Inc•Santa Clara, CA

13h

About The Position

AMD’s Network Technologies Solutions Group (NTSG) develops advanced networking silicon and software for data center, cloud, and enterprise infrastructure. We are seeking a hands-on MTS ASIC Emulation Engineer to lead emulation of complex networking subsystems and SoCs using ZeBu, Veloce, and Palladium platforms. You will define emulation strategy, build scalable environments, enable hardware-software co-verification, and drive functional and performance validation before silicon. You will work on next-generation technologies spanning high-speed Ethernet, PCIe, DMA, RDMA, packet processing, traffic management, embedded processors, firmware, and complete system use cases.

Requirements

Strong hands-on experience with ZeBu, Veloce, Palladium, or equivalent hardware emulation platforms.
Strong debug skills spanning RTL, firmware, software, and system-level interactions.
Experience with transactors, emulation environments, and hardware-software co-verification.
Proficiency in C/C++, Python, Tcl, Shell, or equivalent scripting languages.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, with relevant industry experience.

Nice To Haves

Experience with high-speed Ethernet, RDMA/RoCE, PCIe Gen5/Gen6, or advanced networking architectures.
Experience with packet-processing pipelines, switch fabrics, traffic managers, schedulers, or QoS architectures.
Experience with performance validation, silicon bring-up, diagnostics, or post-silicon debug.
Experience leading technical projects and mentoring engineers
Deep expertise in one emulation platform and strong system-level debug skills are more important than experience with every platform or technology listed.

Responsibilities

Define emulation strategy for complex networking IP, subsystems, and SoCs.
Bring up and deploy designs on ZeBu, Veloce, Palladium, or equivalent platforms.
Develop reusable emulation environments, transactors, and infrastructure.
Drive platform readiness, scalability, stability, and validation closure.
Enable firmware boot, driver development, operating-system bring-up, and system-level workloads prior to silicon.
Develop and execute end-to-end validation scenarios spanning hardware, firmware, and software.
Partner closely with firmware and software teams to accelerate product development and debug.
Validate networking and I/O subsystems including Ethernet, PCIe, DMA, RDMA, packet processing, and traffic management.
Execute long-running workloads and use cases that are impractical in RTL simulation.
Verify throughput, latency, QoS, congestion, and system-level performance against architectural goals.
Debug complex issues across RTL, emulation infrastructure, firmware, drivers, and software stacks.
Drive workload enablement, regression health, failure triage, and validation closure.
Collaborate with architecture, design, verification, and silicon-validation teams.
Mentor engineers and provide technical leadership across emulation activities.