ASIC Design Verification Engineer
About The Position
This role requires being onsite in San Jose, CA at least 4 days/week. The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.
Requirements
- Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience.
- Experience in System Verilog, UVM, and verification methodologies including emulation.
- Experience architecting verification strategies for complex ASIC programs.
- Experience leading verification teams or projects.
- Experience in scripting (Python, Perl) and C/C++ programming language.
Nice To Haves
- Experience in data center, Hyperscalers, or AI Networking technologies.
- Author or contributor to industry standards or best practices in ASIC verification.
- Deep expertise in multiple protocols and large-scale SoC architectures.
- Experience with advanced emulation, prototyping, and formal verification tools at scale.
- Experience with silicon bring-up and post-silicon debug.
- Strong leadership, communication, and mentoring skills.
Responsibilities
- Set vision and strategy for ASIC verification methodology and execution across multiple programs and product lines.
- Serve as technical authority and mentor for verification teams, fostering technical excellence and innovation.
- Lead architecture and implementation of scalable, reusable verification infrastructure and methodologies.
- Drive cross-functional initiatives to improve verification efficiency, quality, and coverage at scale.
- Influence ASIC architecture and design to enable robust verification and high-quality silicon.
- Serve as subject matter expert and advisor on industry trends, best practices, and new technologies.
- Provide technical leadership in root cause analysis and resolution of complex issues during bring-up and post-silicon validation.
Benefits
- medical, dental and vision insurance
- a 401(k) plan with a Cisco matching contribution
- paid parental leave
- short and long-term disability coverage
- basic life insurance
- grants of Cisco restricted stock units
- 10 paid holidays per full calendar year
- 1 floating holiday for non-exempt employees
- 1 paid day off for employee’s birthday
- paid year-end holiday shutdown
- 4 paid days off for personal wellness
- 16 days of paid vacation time per full calendar year (non-exempt)
- flexible vacation time off program (exempt)
- 80 hours of sick time off provided on hire date and each January 1st thereafter
- up to 80 hours of unused sick time carried forward
- Additional paid time away may be requested to deal with critical or emergency issues for family members
- Optional 10 paid days per full calendar year to volunteer
- annual bonuses (for non-sales roles)
- performance-based incentive pay (for sales roles)
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What This Job Offers
Job Type
Full-time
Career Level
Senior
