ASIC Design Verification Engineer (Hardware Security)
About The Position
The Hardware Security team works on cutting edge security solution products for premium Snapdragon chip sets and is seeking Hardware Design engineers with solid ASIC design experience in San Diego, CA. This is a high-level, high-profile position, requiring interaction with cross-functional teams. The work will expose the candidate to all aspects of hardware security product creation flow, including Architecture, Microarchitecture, Design, Validation, IP development, Synthesis, Timing closure, Layout, and thorough Silicon Testing. Candidates will be exposed and involved in state-of-the-art security solutions, countermeasures and techniques.
Requirements
- Bachelor’s degree in electrical engineering, or related Sciences
- 6+ years of experience in ASIC design
- Experience and understanding of ASIC design flow: Architecture, Microarchitecture, verilog/system-verilog RTL design, Clock Domain Crossings, DFT, synthesis, and timing closure
- Knowledge of bus protocols, clocks/resets, debug concepts
- Problem solving, strong communication and teamwork skills
- Self-driven, motivated, able to work with minimum supervision
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
- Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
- PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Nice To Haves
- Experience with microcontroller CPUs, Busses (AHB/AXI/others), or Peripherals
- Experience with system level architecture, complex subsystems, integration of analog and digital IP, implementation techniques, silicon test
- Experience with High-speed, Low Area, and Low Power architecture
- Experience in hardware security fields like Root of Trust, RNG, symmetric and asymmetric crypto, side-channel, error correction codes, hardening, etc
- Experience in verification, modeling, test-planning
- Master's or PhD preferred.
Responsibilities
- Architecture
- Microarchitecture
- Design
- Validation
- IP development
- Synthesis
- Timing closure
- Layout
- Silicon Testing
Benefits
- competitive annual discretionary bonus program
- opportunity for annual RSU grants
- highly competitive benefits package
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What This Job Offers
Job Type
Full-time
Career Level
Senior
